/* * SAMSUNG EXYNOS5250 SoC device tree source * * Copyright (c) 2012 Samsung Electronics Co., Ltd. * http://www.samsung.com * * SAMSUNG EXYNOS5250 SoC device nodes are listed in this file. * EXYNOS5250 based board files can include this file and provide * values for board specfic bindings. * * Note: This file does not include device nodes for all the controllers in * EXYNOS5250 SoC. As device tree coverage for EXYNOS5250 increases, * additional nodes can be added to this file. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ /include/ "skeleton.dtsi" /include/ "exynos5250-pinctrl.dtsi" / { compatible = "samsung,exynos5250"; interrupt-parent = <&gic>; aliases { spi0 = &spi_0; spi1 = &spi_1; spi2 = &spi_2; gsc0 = &gsc_0; gsc1 = &gsc_1; gsc2 = &gsc_2; gsc3 = &gsc_3; mshc0 = &dwmmc_0; mshc1 = &dwmmc_1; mshc2 = &dwmmc_2; mshc3 = &dwmmc_3; i2c0 = &i2c_0; i2c1 = &i2c_1; i2c2 = &i2c_2; i2c3 = &i2c_3; i2c4 = &i2c_4; i2c5 = &i2c_5; i2c6 = &i2c_6; i2c7 = &i2c_7; i2c8 = &i2c_8; pinctrl0 = &pinctrl_0; pinctrl1 = &pinctrl_1; pinctrl2 = &pinctrl_2; pinctrl3 = &pinctrl_3; }; chipid@10000000 { compatible = "samsung,exynos4210-chipid"; reg = <0x10000000 0x100>; }; pd_gsc: gsc-power-domain@0x10044000 { compatible = "samsung,exynos4210-pd"; reg = <0x10044000 0x20>; }; pd_mfc: mfc-power-domain@0x10044040 { compatible = "samsung,exynos4210-pd"; reg = <0x10044040 0x20>; }; clock: clock-controller@0x10010000 { compatible = "samsung,exynos5250-clock"; reg = <0x10010000 0x30000>; #clock-cells = <1>; }; gic:interrupt-controller@10481000 { compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic"; #interrupt-cells = <3>; interrupt-controller; reg = <0x10481000 0x1000>, <0x10482000 0x1000>, <0x10484000 0x2000>, <0x10486000 0x2000>; interrupts = <1 9 0xf04>; }; timer { compatible = "arm,armv7-timer"; interrupts = <1 13 0xf08>, <1 14 0xf08>, <1 11 0xf08>, <1 10 0xf08>; }; combiner:interrupt-controller@10440000 { compatible = "samsung,exynos4210-combiner"; #interrupt-cells = <2>; interrupt-controller; samsung,combiner-nr = <32>; reg = <0x10440000 0x1000>; interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>, <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>, <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>, <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>, <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>, <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>, <0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>, <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>; }; mct@101C0000 { compatible = "samsung,exynos4210-mct"; reg = <0x101C0000 0x800>; interrupt-controller; #interrups-cells = <2>; interrupt-parent = <&mct_map>; interrupts = <0 0>, <1 0>, <2 0>, <3 0>, <4 0>, <5 0>; clocks = <&clock 1>, <&clock 335>; clock-names = "fin_pll", "mct"; mct_map: mct-map { #interrupt-cells = <2>; #address-cells = <0>; #size-cells = <0>; interrupt-map = <0x0 0 &combiner 23 3>, <0x1 0 &combiner 23 4>, <0x2 0 &combiner 25 2>, <0x3 0 &combiner 25 3>, <0x4 0 &gic 0 120 0>, <0x5 0 &gic 0 121 0>; }; }; pmu { compatible = "arm,cortex-a15-pmu"; interrupt-parent = <&combiner>; interrupts = <1 2>, <22 4>; }; pinctrl_0: pinctrl@11400000 { compatible = "samsung,exynos5250-pinctrl"; reg = <0x11400000 0x1000>; interrupts = <0 46 0>; wakup_eint: wakeup-interrupt-controller { compatible = "samsung,exynos4210-wakeup-eint"; interrupt-parent = <&gic>; interrupts = <0 32 0>; }; }; pinctrl_1: pinctrl@13400000 { compatible = "samsung,exynos5250-pinctrl"; reg = <0x13400000 0x1000>; interrupts = <0 45 0>; }; pinctrl_2: pinctrl@10d10000 { compatible = "samsung,exynos5250-pinctrl"; reg = <0x10d10000 0x1000>; interrupts = <0 50 0>; }; pinctrl_3: pinctrl@03860000 { compatible = "samsung,exynos5250-pinctrl"; reg = <0x03860000 0x1000>; interrupts = <0 47 0>; }; watchdog { compatible = "samsung,s3c2410-wdt"; reg = <0x101D0000 0x100>; interrupts = <0 42 0>; clocks = <&clock 336>; clock-names = "watchdog"; }; codec@11000000 { compatible = "samsung,mfc-v6"; reg = <0x11000000 0x10000>; interrupts = <0 96 0>; samsung,power-domain = <&pd_mfc>; }; rtc { compatible = "samsung,s3c6410-rtc"; reg = <0x101E0000 0x100>; interrupts = <0 43 0>, <0 44 0>; clocks = <&clock 337>; clock-names = "rtc"; status = "disabled"; }; tmu@10060000 { compatible = "samsung,exynos5250-tmu"; reg = <0x10060000 0x100>; interrupts = <0 65 0>; clocks = <&clock 338>; clock-names = "tmu_apbif"; }; serial@12C00000 { compatible = "samsung,exynos4210-uart"; reg = <0x12C00000 0x100>; interrupts = <0 51 0>; clocks = <&clock 289>, <&clock 146>; clock-names = "uart", "clk_uart_baud0"; }; serial@12C10000 { compatible = "samsung,exynos4210-uart"; reg = <0x12C10000 0x100>; interrupts = <0 52 0>; clocks = <&clock 290>, <&clock 147>; clock-names = "uart", "clk_uart_baud0"; }; serial@12C20000 { compatible = "samsung,exynos4210-uart"; reg = <0x12C20000 0x100>; interrupts = <0 53 0>; clocks = <&clock 291>, <&clock 148>; clock-names = "uart", "clk_uart_baud0"; }; serial@12C30000 { compatible = "samsung,exynos4210-uart"; reg = <0x12C30000 0x100>; interrupts = <0 54 0>; clocks = <&clock 292>, <&clock 149>; clock-names = "uart", "clk_uart_baud0"; }; sata@122F0000 { compatible = "samsung,exynos5-sata-ahci"; reg = <0x122F0000 0x1ff>; interrupts = <0 115 0>; clocks = <&clock 277>, <&clock 143>; clock-names = "sata", "sclk_sata"; }; sata-phy@12170000 { compatible = "samsung,exynos5-sata-phy"; reg = <0x12170000 0x1ff>; }; i2c_0: i2c@12C60000 { compatible = "samsung,s3c2440-i2c"; reg = <0x12C60000 0x100>; interrupts = <0 56 0>; #address-cells = <1>; #size-cells = <0>; clocks = <&clock 294>; clock-names = "i2c"; pinctrl-names = "default"; pinctrl-0 = <&i2c0_bus>; }; i2c_1: i2c@12C70000 { compatible = "samsung,s3c2440-i2c"; reg = <0x12C70000 0x100>; interrupts = <0 57 0>; #address-cells = <1>; #size-cells = <0>; clocks = <&clock 295>; clock-names = "i2c"; pinctrl-names = "default"; pinctrl-0 = <&i2c1_bus>; }; i2c_2: i2c@12C80000 { compatible = "samsung,s3c2440-i2c"; reg = <0x12C80000 0x100>; interrupts = <0 58 0>; #address-cells = <1>; #size-cells = <0>; clocks = <&clock 296>; clock-names = "i2c"; pinctrl-names = "default"; pinctrl-0 = <&i2c2_bus>; }; i2c_3: i2c@12C90000 { compatible = "samsung,s3c2440-i2c"; reg = <0x12C90000 0x100>; interrupts = <0 59 0>; #address-cells = <1>; #size-cells = <0>; clocks = <&clock 297>; clock-names = "i2c"; pinctrl-names = "default"; pinctrl-0 = <&i2c3_bus>; }; i2c_4: i2c@12CA0000 { compatible = "samsung,s3c2440-i2c"; reg = <0x12CA0000 0x100>; interrupts = <0 60 0>; #address-cells = <1>; #size-cells = <0>; clocks = <&clock 298>; clock-names = "i2c"; pinctrl-names = "default"; pinctrl-0 = <&i2c4_bus>; }; i2c_5: i2c@12CB0000 { compatible = "samsung,s3c2440-i2c"; reg = <0x12CB0000 0x100>; interrupts = <0 61 0>; #address-cells = <1>; #size-cells = <0>; clocks = <&clock 299>; clock-names = "i2c"; pinctrl-names = "default"; pinctrl-0 = <&i2c5_bus>; }; i2c_6: i2c@12CC0000 { compatible = "samsung,s3c2440-i2c"; reg = <0x12CC0000 0x100>; interrupts = <0 62 0>; #address-cells = <1>; #size-cells = <0>; clocks = <&clock 300>; clock-names = "i2c"; pinctrl-names = "default"; pinctrl-0 = <&i2c6_bus>; }; i2c_7: i2c@12CD0000 { compatible = "samsung,s3c2440-i2c"; reg = <0x12CD0000 0x100>; interrupts = <0 63 0>; #address-cells = <1>; #size-cells = <0>; clocks = <&clock 301>; clock-names = "i2c"; pinctrl-names = "default"; pinctrl-0 = <&i2c7_bus>; }; i2c_8: i2c@12CE0000 { compatible = "samsung,s3c2440-hdmiphy-i2c"; reg = <0x12CE0000 0x1000>; interrupts = <0 64 0>; #address-cells = <1>; #size-cells = <0>; clocks = <&clock 302>; clock-names = "i2c"; }; i2c@121D0000 { compatible = "samsung,exynos5-sata-phy-i2c"; reg = <0x121D0000 0x100>; #address-cells = <1>; #size-cells = <0>; clocks = <&clock 288>; clock-names = "i2c"; }; spi_0: spi@12d20000 { compatible = "samsung,exynos4210-spi"; reg = <0x12d20000 0x100>; interrupts = <0 66 0>; dmas = <&pdma0 5 &pdma0 4>; dma-names = "tx", "rx"; #address-cells = <1>; #size-cells = <0>; clocks = <&clock 304>, <&clock 154>; clock-names = "spi", "spi_busclk0"; pinctrl-names = "default"; pinctrl-0 = <&spi0_bus>; }; spi_1: spi@12d30000 { compatible = "samsung,exynos4210-spi"; reg = <0x12d30000 0x100>; interrupts = <0 67 0>; dmas = <&pdma1 5 &pdma1 4>; dma-names = "tx", "rx"; #address-cells = <1>; #size-cells = <0>; clocks = <&clock 305>, <&clock 155>; clock-names = "spi", "spi_busclk0"; pinctrl-names = "default"; pinctrl-0 = <&spi1_bus>; }; spi_2: spi@12d40000 { compatible = "samsung,exynos4210-spi"; reg = <0x12d40000 0x100>; interrupts = <0 68 0>; dmas = <&pdma0 7 &pdma0 6>; dma-names = "tx", "rx"; #address-cells = <1>; #size-cells = <0>; clocks = <&clock 306>, <&clock 156>; clock-names = "spi", "spi_busclk0"; pinctrl-names = "default"; pinctrl-0 = <&spi2_bus>; }; dwmmc_0: dwmmc0@12200000 { compatible = "samsung,exynos5250-dw-mshc"; reg = <0x12200000 0x1000>; interrupts = <0 75 0>; #address-cells = <1>; #size-cells = <0>; clocks = <&clock 280>, <&clock 139>; clock-names = "biu", "ciu"; }; dwmmc_1: dwmmc1@12210000 { compatible = "samsung,exynos5250-dw-mshc"; reg = <0x12210000 0x1000>; interrupts = <0 76 0>; #address-cells = <1>; #size-cells = <0>; clocks = <&clock 281>, <&clock 140>; clock-names = "biu", "ciu"; }; dwmmc_2: dwmmc2@12220000 { compatible = "samsung,exynos5250-dw-mshc"; reg = <0x12220000 0x1000>; interrupts = <0 77 0>; #address-cells = <1>; #size-cells = <0>; clocks = <&clock 282>, <&clock 141>; clock-names = "biu", "ciu"; }; dwmmc_3: dwmmc3@12230000 { compatible = "samsung,exynos5250-dw-mshc"; reg = <0x12230000 0x1000>; interrupts = <0 78 0>; #address-cells = <1>; #size-cells = <0>; clocks = <&clock 283>, <&clock 142>; clock-names = "biu", "ciu"; }; i2s0: i2s@03830000 { compatible = "samsung,i2s-v5"; reg = <0x03830000 0x100>; dmas = <&pdma0 10 &pdma0 9 &pdma0 8>; dma-names = "tx", "rx", "tx-sec"; samsung,supports-6ch; samsung,supports-rstclr; samsung,supports-secdai; samsung,idma-addr = <0x03000000>; pinctrl-names = "default"; pinctrl-0 = <&i2s0_bus>; }; i2s1: i2s@12D60000 { compatible = "samsung,i2s-v5"; reg = <0x12D60000 0x100>; dmas = <&pdma1 12 &pdma1 11>; dma-names = "tx", "rx"; pinctrl-names = "default"; pinctrl-0 = <&i2s1_bus>; }; i2s2: i2s@12D70000 { compatible = "samsung,i2s-v5"; reg = <0x12D70000 0x100>; dmas = <&pdma0 12 &pdma0 11>; dma-names = "tx", "rx"; pinctrl-names = "default"; pinctrl-0 = <&i2s2_bus>; }; usb@12110000 { compatible = "samsung,exynos4210-ehci"; reg = <0x12110000 0x100>; interrupts = <0 71 0>; clocks = <&clock 285>; clock-names = "usbhost"; }; usb@12120000 { compatible = "samsung,exynos4210-ohci"; reg = <0x12120000 0x100>; interrupts = <0 71 0>; clocks = <&clock 285>; clock-names = "usbhost"; }; usbphy@12130000 { compatible = "samsung,exynos5250-usb2phy"; reg = <0x12130000 0x100>; clocks = <&clock 1>, <&clock 285>; clock-names = "ext_xtal", "usbhost"; #address-cells = <1>; #size-cells = <1>; ranges; usbphy-sys { reg = <0x10040704 0x8>, <0x10050230 0x4>; }; }; amba { #address-cells = <1>; #size-cells = <1>; compatible = "arm,amba-bus"; interrupt-parent = <&gic>; ranges; pdma0: pdma@121A0000 { compatible = "arm,pl330", "arm,primecell"; reg = <0x121A0000 0x1000>; interrupts = <0 34 0>; clocks = <&clock 275>; clock-names = "apb_pclk"; #dma-cells = <1>; #dma-channels = <8>; #dma-requests = <32>; }; pdma1: pdma@121B0000 { compatible = "arm,pl330", "arm,primecell"; reg = <0x121B0000 0x1000>; interrupts = <0 35 0>; clocks = <&clock 276>; clock-names = "apb_pclk"; #dma-cells = <1>; #dma-channels = <8>; #dma-requests = <32>; }; mdma0: mdma@10800000 { compatible = "arm,pl330", "arm,primecell"; reg = <0x10800000 0x1000>; interrupts = <0 33 0>; clocks = <&clock 346>; clock-names = "apb_pclk"; #dma-cells = <1>; #dma-channels = <8>; #dma-requests = <1>; }; mdma1: mdma@11C10000 { compatible = "arm,pl330", "arm,primecell"; reg = <0x11C10000 0x1000>; interrupts = <0 124 0>; clocks = <&clock 271>; clock-names = "apb_pclk"; #dma-cells = <1>; #dma-channels = <8>; #dma-requests = <1>; }; }; gsc_0: gsc@0x13e00000 { compatible = "samsung,exynos5-gsc"; reg = <0x13e00000 0x1000>; interrupts = <0 85 0>; samsung,power-domain = <&pd_gsc>; clocks = <&clock 256>; clock-names = "gscl"; }; gsc_1: gsc@0x13e10000 { compatible = "samsung,exynos5-gsc"; reg = <0x13e10000 0x1000>; interrupts = <0 86 0>; samsung,power-domain = <&pd_gsc>; clocks = <&clock 257>; clock-names = "gscl"; }; gsc_2: gsc@0x13e20000 { compatible = "samsung,exynos5-gsc"; reg = <0x13e20000 0x1000>; interrupts = <0 87 0>; samsung,power-domain = <&pd_gsc>; clocks = <&clock 258>; clock-names = "gscl"; }; gsc_3: gsc@0x13e30000 { compatible = "samsung,exynos5-gsc"; reg = <0x13e30000 0x1000>; interrupts = <0 88 0>; samsung,power-domain = <&pd_gsc>; clocks = <&clock 259>; clock-names = "gscl"; }; hdmi { compatible = "samsung,exynos5-hdmi"; reg = <0x14530000 0x70000>, <0x10040700 0x4>; interrupts = <0 95 0>; clocks = <&clock 344>, <&clock 136>, <&clock 137>, <&clock 157>, <&clock 1024>; clock-names = "hdmi", "sclk_hdmi", "sclk_pixel", "sclk_hdmiphy", "mout_hdmi"; }; mixer { compatible = "samsung,exynos5-mixer"; reg = <0x14450000 0x10000>; interrupts = <0 94 0>; clocks = <&clock 343>, <&clock 136>; clock-names = "mixer", "sclk_hdmi"; }; dp-controller { compatible = "samsung,exynos5-dp"; reg = <0x145b0000 0x1000>; interrupts = <10 3>; interrupt-parent = <&combiner>; #address-cells = <1>; #size-cells = <0>; dptx-phy { reg = <0x10040720>; samsung,enable-mask = <1>; }; }; fimd { compatible = "samsung,exynos5250-fimd"; interrupt-parent = <&combiner>; reg = <0x14400000 0x40000>; interrupt-names = "fifo", "vsync", "lcd_sys"; interrupts = <18 4>, <18 5>, <18 6>; clocks = <&clock 133>, <&clock 339>; clock-names = "sclk_fimd", "fimd"; }; };