From 4f304245bb6cfa665ff21b12c059499eafa8b725 Mon Sep 17 00:00:00 2001 From: Paul Parsons Date: Mon, 9 Apr 2012 13:18:31 +0100 Subject: mfd: Set asic3 DS1WM clock_rate The mfd/asic3 driver does not set the ds1wm_driver_data clock_rate field before passing the structure to the DS1WM w1 busmaster driver. This was not noticed before commit 26a6afb, because ds1wm_find_divisor() unintentionally returned the correct divisor when a zero clock_rate was passed in. However after that commit DS1WM fails a zero clock_rate: ds1wm ds1wm: no suitable divisor for 0Hz clock This patch sets the ds1wm_driver_data clock_rate field. Signed-off-by: Paul Parsons Acked-by: Philipp Zabel Signed-off-by: Samuel Ortiz --- drivers/mfd/asic3.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) (limited to 'drivers/mfd/asic3.c') diff --git a/drivers/mfd/asic3.c b/drivers/mfd/asic3.c index f75dc6733f4..4c3ec8113e7 100644 --- a/drivers/mfd/asic3.c +++ b/drivers/mfd/asic3.c @@ -894,10 +894,13 @@ static int __init asic3_mfd_probe(struct platform_device *pdev, asic3_mmc_resources[0].start >>= asic->bus_shift; asic3_mmc_resources[0].end >>= asic->bus_shift; - ret = mfd_add_devices(&pdev->dev, pdev->id, + if (pdata->clock_rate) { + ds1wm_pdata.clock_rate = pdata->clock_rate; + ret = mfd_add_devices(&pdev->dev, pdev->id, &asic3_cell_ds1wm, 1, mem, asic->irq_base); - if (ret < 0) - goto out; + if (ret < 0) + goto out; + } if (mem_sdio && (irq >= 0)) { ret = mfd_add_devices(&pdev->dev, pdev->id, -- cgit v1.2.3