From 9fa65bf6c0e158b96a6b2a6e84dc631de6fed3c1 Mon Sep 17 00:00:00 2001 From: Alex Deucher Date: Thu, 16 Jan 2014 18:02:59 -0500 Subject: drm/radeon: fix surface sync in fence on cayman (v2) commit 10e9ffae463396c5a25fdfe8a48d7c98a87f6b85 upstream. We need to set the engine bit to select the ME and also set the full cache bit. Should help stability on TN and cayman. V2: fix up surface sync in ib execute as well Signed-off-by: Alex Deucher Signed-off-by: Greg Kroah-Hartman --- drivers/gpu/drm/radeon/nid.h | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/gpu/drm/radeon/nid.h') diff --git a/drivers/gpu/drm/radeon/nid.h b/drivers/gpu/drm/radeon/nid.h index e226faf16fe..e49f7b45603 100644 --- a/drivers/gpu/drm/radeon/nid.h +++ b/drivers/gpu/drm/radeon/nid.h @@ -573,6 +573,7 @@ # define PACKET3_DB_ACTION_ENA (1 << 26) # define PACKET3_SH_ACTION_ENA (1 << 27) # define PACKET3_SX_ACTION_ENA (1 << 28) +# define PACKET3_ENGINE_ME (1 << 31) #define PACKET3_ME_INITIALIZE 0x44 #define PACKET3_ME_INITIALIZE_DEVICE_ID(x) ((x) << 16) #define PACKET3_COND_WRITE 0x45 -- cgit v1.2.3