From 98eba195f9f6efff2259f17e2261209e47529ab1 Mon Sep 17 00:00:00 2001 From: Marc Zyngier Date: Mon, 4 Nov 2013 16:55:22 +0000 Subject: arm64: move enabling of GIC before CPUs are set online Commit 53ae3acd (arm64: Only enable local interrupts after the CPU is marked online) moved the enabling of the GIC after the CPUs are marked online. This has some interesting effect: [...] [] gic_raise_softirq+0xf8/0x160 [] smp_send_reschedule+0x38/0x40 [] resched_task+0x84/0xc0 [] check_preempt_curr+0x58/0x98 [] ttwu_do_wakeup+0x1c/0xf4 [] ttwu_do_activate.constprop.84+0x64/0x70 [] try_to_wake_up+0x1d4/0x2b4 [] default_wake_function+0x10/0x18 [] __wake_up_common+0x60/0xa0 [] complete+0x48/0x64 [] secondary_start_kernel+0xe8/0x110 [...] Here, we end-up calling gic_raise_softirq without having initialized the interrupt controller for this CPU. While this goes unnoticed with GICv2 (the distributor is always accessible), it explodes with GICv3. The fix is to move the call to notify_cpu_starting before we set the secondary CPU online. Signed-off-by: Marc Zyngier Signed-off-by: Catalin Marinas --- arch/arm64/kernel/smp.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'arch') diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c index 87340fd5393..35085d66459 100644 --- a/arch/arm64/kernel/smp.c +++ b/arch/arm64/kernel/smp.c @@ -155,6 +155,11 @@ asmlinkage void __cpuinit secondary_start_kernel(void) smp_store_cpu_info(cpu); + /* + * Enable GIC and timers. + */ + notify_cpu_starting(cpu); + /* * OK, now it's safe to let the boot CPU continue. Wait for * the CPU migration code to notice that the CPU is online @@ -163,11 +168,6 @@ asmlinkage void __cpuinit secondary_start_kernel(void) set_cpu_online(cpu, true); complete(&cpu_running); - /* - * Enable GIC and timers. - */ - notify_cpu_starting(cpu); - local_irq_enable(); local_fiq_enable(); -- cgit v1.2.3