From e44b8941908ec9ccf03b52713c9e7d3471bada8c Mon Sep 17 00:00:00 2001 From: Dale Farnsworth Date: Sat, 12 May 2007 10:55:24 +1000 Subject: [POWERPC] Add interrupt support for Marvell mv64x60 chips There are 3 interrupt groups each with its own status/mask registers. We use a separate struct irq_chip for each interrupt group and handle interrupts in two stages or levels: level 1 selects the appropriate struct irq_chip, and level 2 selects individual interrupts within that irq_chip. Signed-off-by: Dale Farnsworth Signed-off-by: Paul Mackerras --- arch/powerpc/sysdev/Makefile | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/powerpc/sysdev/Makefile') diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile index 9ce775c38ab..041c832bc40 100644 --- a/arch/powerpc/sysdev/Makefile +++ b/arch/powerpc/sysdev/Makefile @@ -16,6 +16,7 @@ obj-$(CONFIG_FSL_SOC) += fsl_soc.o obj-$(CONFIG_FSL_PCIE) += fsl_pcie.o obj-$(CONFIG_TSI108_BRIDGE) += tsi108_pci.o tsi108_dev.o obj-$(CONFIG_QUICC_ENGINE) += qe_lib/ +obj-$(CONFIG_MV64X60) += mv64x60_pic.o # contains only the suspend handler for time obj-$(CONFIG_PM) += timer.o -- cgit v1.2.3