diff options
Diffstat (limited to 'arch/mips')
27 files changed, 93 insertions, 66 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 2ac626ab9d4..5d7170bfeb2 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -4,7 +4,6 @@ config MIPS select HAVE_GENERIC_DMA_COHERENT select HAVE_IDE select HAVE_OPROFILE - select HAVE_IRQ_WORK select HAVE_PERF_EVENTS select PERF_USE_VMALLOC select HAVE_ARCH_KGDB @@ -170,7 +169,7 @@ config MACH_DECSTATION select SYS_HAS_CPU_R3000 select SYS_HAS_CPU_R4X00 select SYS_SUPPORTS_32BIT_KERNEL - select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL + select SYS_SUPPORTS_64BIT_KERNEL select SYS_SUPPORTS_LITTLE_ENDIAN select SYS_SUPPORTS_128HZ select SYS_SUPPORTS_256HZ @@ -206,7 +205,7 @@ config MACH_JAZZ select ISA select SYS_HAS_CPU_R4X00 select SYS_SUPPORTS_32BIT_KERNEL - select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL + select SYS_SUPPORTS_64BIT_KERNEL select SYS_SUPPORTS_100HZ help This a family of machines based on the MIPS R4030 chipset which was @@ -396,7 +395,6 @@ config PNX8550_STB810 config PMC_MSP bool "PMC-Sierra MSP chipsets" - depends on EXPERIMENTAL select CEVT_R4K select CSRC_R4K select DMA_NONCOHERENT @@ -495,8 +493,7 @@ config SGI_IP27 here. config SGI_IP28 - bool "SGI IP28 (Indigo2 R10k) (EXPERIMENTAL)" - depends on EXPERIMENTAL + bool "SGI IP28 (Indigo2 R10k)" select FW_ARC select FW_ARC64 select BOOT_ELF64 @@ -554,7 +551,6 @@ config SGI_IP32 config SIBYTE_CRHINE bool "Sibyte BCM91120C-CRhine" - depends on EXPERIMENTAL select BOOT_ELF32 select DMA_COHERENT select SIBYTE_BCM1120 @@ -565,7 +561,6 @@ config SIBYTE_CRHINE config SIBYTE_CARMEL bool "Sibyte BCM91120x-Carmel" - depends on EXPERIMENTAL select BOOT_ELF32 select DMA_COHERENT select SIBYTE_BCM1120 @@ -576,7 +571,6 @@ config SIBYTE_CARMEL config SIBYTE_CRHONE bool "Sibyte BCM91125C-CRhone" - depends on EXPERIMENTAL select BOOT_ELF32 select DMA_COHERENT select SIBYTE_BCM1125 @@ -588,7 +582,6 @@ config SIBYTE_CRHONE config SIBYTE_RHONE bool "Sibyte BCM91125E-Rhone" - depends on EXPERIMENTAL select BOOT_ELF32 select DMA_COHERENT select SIBYTE_BCM1125H @@ -613,7 +606,6 @@ config SIBYTE_SWARM config SIBYTE_LITTLESUR bool "Sibyte BCM91250C2-LittleSur" - depends on EXPERIMENTAL select BOOT_ELF32 select DMA_COHERENT select HAVE_PATA_PLATFORM @@ -627,7 +619,6 @@ config SIBYTE_LITTLESUR config SIBYTE_SENTOSA bool "Sibyte BCM91250E-Sentosa" - depends on EXPERIMENTAL select BOOT_ELF32 select DMA_COHERENT select NR_CPUS_DEFAULT_2 @@ -676,7 +667,7 @@ config SNI_RM select R5000_CPU_SCACHE select SYS_HAS_EARLY_PRINTK select SYS_SUPPORTS_32BIT_KERNEL - select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL + select SYS_SUPPORTS_64BIT_KERNEL select SYS_SUPPORTS_BIG_ENDIAN select SYS_SUPPORTS_HIGHMEM select SYS_SUPPORTS_LITTLE_ENDIAN @@ -780,7 +771,6 @@ config CAVIUM_OCTEON_REFERENCE_BOARD config NLM_XLR_BOARD bool "Netlogic XLR/XLS based systems" - depends on EXPERIMENTAL select BOOT_ELF32 select NLM_COMMON select SYS_HAS_CPU_XLR @@ -809,7 +799,6 @@ config NLM_XLR_BOARD config NLM_XLP_BOARD bool "Netlogic XLP based systems" - depends on EXPERIMENTAL select BOOT_ELF32 select NLM_COMMON select SYS_HAS_CPU_XLP @@ -1375,7 +1364,6 @@ config CPU_R5500 config CPU_R6000 bool "R6000" - depends on EXPERIMENTAL depends on SYS_HAS_CPU_R6000 select CPU_SUPPORTS_32BIT_KERNEL help @@ -1393,7 +1381,6 @@ config CPU_NEVADA config CPU_R8000 bool "R8000" - depends on EXPERIMENTAL depends on SYS_HAS_CPU_R8000 select CPU_HAS_PREFETCH select CPU_SUPPORTS_64BIT_KERNEL @@ -1768,7 +1755,7 @@ config PAGE_SIZE_4KB config PAGE_SIZE_8KB bool "8kB" - depends on (EXPERIMENTAL && CPU_R8000) || CPU_CAVIUM_OCTEON + depends on CPU_R8000 || CPU_CAVIUM_OCTEON help Using 8kB page size will result in higher performance kernel at the price of higher memory consumption. This option is available @@ -1795,7 +1782,7 @@ config PAGE_SIZE_32KB config PAGE_SIZE_64KB bool "64kB" - depends on EXPERIMENTAL && !CPU_R3000 && !CPU_TX39XX + depends on !CPU_R3000 && !CPU_TX39XX help Using 64kB page size will result in higher performance kernel at the price of higher memory consumption. This option is available on @@ -2161,7 +2148,6 @@ source "mm/Kconfig" config SMP bool "Multi-Processing support" depends on SYS_SUPPORTS_SMP - select IRQ_PER_CPU select USE_GENERIC_SMP_HELPERS help This enables support for systems with more than one CPU. If you have @@ -2312,8 +2298,7 @@ config HZ source "kernel/Kconfig.preempt" config KEXEC - bool "Kexec system call (EXPERIMENTAL)" - depends on EXPERIMENTAL + bool "Kexec system call" help kexec is a system call that implements the ability to shutdown your current kernel, and to start another kernel. It is like a reboot diff --git a/arch/mips/bcm47xx/Kconfig b/arch/mips/bcm47xx/Kconfig index d7af29f1fcf..ba611927749 100644 --- a/arch/mips/bcm47xx/Kconfig +++ b/arch/mips/bcm47xx/Kconfig @@ -8,8 +8,10 @@ config BCM47XX_SSB select SSB_DRIVER_EXTIF select SSB_EMBEDDED select SSB_B43_PCI_BRIDGE if PCI + select SSB_DRIVER_PCICORE if PCI select SSB_PCICORE_HOSTMODE if PCI select SSB_DRIVER_GPIO + select GPIOLIB default y help Add support for old Broadcom BCM47xx boards with Sonics Silicon Backplane support. @@ -25,6 +27,7 @@ config BCM47XX_BCMA select BCMA_HOST_PCI if PCI select BCMA_DRIVER_PCI_HOSTMODE if PCI select BCMA_DRIVER_GPIO + select GPIOLIB default y help Add support for new Broadcom BCM47xx boards with Broadcom specific Advanced Microcontroller Bus. diff --git a/arch/mips/bcm47xx/serial.c b/arch/mips/bcm47xx/serial.c index 57981e4fe2b..b8ef965705c 100644 --- a/arch/mips/bcm47xx/serial.c +++ b/arch/mips/bcm47xx/serial.c @@ -62,7 +62,7 @@ static int __init uart8250_init_bcma(void) p->mapbase = (unsigned int) bcma_port->regs; p->membase = (void *) bcma_port->regs; - p->irq = bcma_port->irq + 2; + p->irq = bcma_port->irq; p->uartclk = bcma_port->baud_base; p->regshift = bcma_port->reg_shift; p->iotype = UPIO_MEM; diff --git a/arch/mips/cavium-octeon/executive/cvmx-l2c.c b/arch/mips/cavium-octeon/executive/cvmx-l2c.c index 9f883bf7695..33b72144db3 100644 --- a/arch/mips/cavium-octeon/executive/cvmx-l2c.c +++ b/arch/mips/cavium-octeon/executive/cvmx-l2c.c @@ -30,6 +30,7 @@ * measurement, and debugging facilities. */ +#include <linux/compiler.h> #include <linux/irqflags.h> #include <asm/octeon/cvmx.h> #include <asm/octeon/cvmx-l2c.h> @@ -285,22 +286,22 @@ uint64_t cvmx_l2c_read_perf(uint32_t counter) */ static void fault_in(uint64_t addr, int len) { - volatile char *ptr; - volatile char dummy; + char *ptr; + /* * Adjust addr and length so we get all cache lines even for * small ranges spanning two cache lines. */ len += addr & CVMX_CACHE_LINE_MASK; addr &= ~CVMX_CACHE_LINE_MASK; - ptr = (volatile char *)cvmx_phys_to_ptr(addr); + ptr = cvmx_phys_to_ptr(addr); /* * Invalidate L1 cache to make sure all loads result in data * being in L2. */ CVMX_DCACHE_INVALIDATE; while (len > 0) { - dummy += *ptr; + ACCESS_ONCE(*ptr); len -= CVMX_CACHE_LINE_SIZE; ptr += CVMX_CACHE_LINE_SIZE; } diff --git a/arch/mips/include/asm/dsp.h b/arch/mips/include/asm/dsp.h index e9bfc0813c7..7bfad0520e2 100644 --- a/arch/mips/include/asm/dsp.h +++ b/arch/mips/include/asm/dsp.h @@ -16,7 +16,7 @@ #include <asm/mipsregs.h> #define DSP_DEFAULT 0x00000000 -#define DSP_MASK 0x3ff +#define DSP_MASK 0x3f #define __enable_dsp_hazard() \ do { \ diff --git a/arch/mips/include/asm/inst.h b/arch/mips/include/asm/inst.h index ab84064283d..33c34adbecf 100644 --- a/arch/mips/include/asm/inst.h +++ b/arch/mips/include/asm/inst.h @@ -353,6 +353,7 @@ union mips_instruction { struct u_format u_format; struct c_format c_format; struct r_format r_format; + struct p_format p_format; struct f_format f_format; struct ma_format ma_format; struct b_format b_format; diff --git a/arch/mips/include/asm/mach-pnx833x/war.h b/arch/mips/include/asm/mach-pnx833x/war.h index edaa06d9d49..e410df4e1b3 100644 --- a/arch/mips/include/asm/mach-pnx833x/war.h +++ b/arch/mips/include/asm/mach-pnx833x/war.h @@ -21,4 +21,4 @@ #define R10000_LLSC_WAR 0 #define MIPS34K_MISSED_ITLB_WAR 0 -#endif /* __ASM_MIPS_MACH_PNX8550_WAR_H */ +#endif /* __ASM_MIPS_MACH_PNX833X_WAR_H */ diff --git a/arch/mips/include/asm/pgtable-64.h b/arch/mips/include/asm/pgtable-64.h index c63191055e6..013d5f78126 100644 --- a/arch/mips/include/asm/pgtable-64.h +++ b/arch/mips/include/asm/pgtable-64.h @@ -230,6 +230,7 @@ static inline void pud_clear(pud_t *pudp) #else #define pte_pfn(x) ((unsigned long)((x).pte >> _PFN_SHIFT)) #define pfn_pte(pfn, prot) __pte(((pfn) << _PFN_SHIFT) | pgprot_val(prot)) +#define pfn_pmd(pfn, prot) __pmd(((pfn) << _PFN_SHIFT) | pgprot_val(prot)) #endif #define __pgd_offset(address) pgd_index(address) diff --git a/arch/mips/include/uapi/asm/Kbuild b/arch/mips/include/uapi/asm/Kbuild index a1a0452ac18..77d4fb33f75 100644 --- a/arch/mips/include/uapi/asm/Kbuild +++ b/arch/mips/include/uapi/asm/Kbuild @@ -3,6 +3,7 @@ include include/uapi/asm-generic/Kbuild.asm header-y += auxvec.h header-y += bitsperlong.h +header-y += break.h header-y += byteorder.h header-y += cachectl.h header-y += errno.h diff --git a/arch/mips/include/asm/break.h b/arch/mips/include/uapi/asm/break.h index 9161e684cb4..9161e684cb4 100644 --- a/arch/mips/include/asm/break.h +++ b/arch/mips/include/uapi/asm/break.h diff --git a/arch/mips/include/uapi/asm/socket.h b/arch/mips/include/uapi/asm/socket.h index 17307ab9047..3e68bfbda6b 100644 --- a/arch/mips/include/uapi/asm/socket.h +++ b/arch/mips/include/uapi/asm/socket.h @@ -28,9 +28,7 @@ #define SO_LINGER 0x0080 /* Block on close of a reliable socket to transmit pending data. */ #define SO_OOBINLINE 0x0100 /* Receive out-of-band data in-band. */ -#if 0 -To add: #define SO_REUSEPORT 0x0200 /* Allow local address and port reuse. */ -#endif +#define SO_REUSEPORT 0x0200 /* Allow local address and port reuse. */ #define SO_TYPE 0x1008 /* Compatible name for SO_STYLE. */ #define SO_STYLE SO_TYPE /* Synonym */ @@ -90,5 +88,6 @@ To add: #define SO_REUSEPORT 0x0200 /* Allow local address and port reuse. */ /* Instruct lower device to use last 4-bytes of skb data as FCS */ #define SO_NOFCS 43 +#define SO_LOCK_FILTER 44 #endif /* _UAPI_ASM_SOCKET_H */ diff --git a/arch/mips/jazz/Kconfig b/arch/mips/jazz/Kconfig index 1f372b0d255..fb1e072da30 100644 --- a/arch/mips/jazz/Kconfig +++ b/arch/mips/jazz/Kconfig @@ -1,6 +1,6 @@ config ACER_PICA_61 - bool "Support for Acer PICA 1 chipset (EXPERIMENTAL)" - depends on MACH_JAZZ && EXPERIMENTAL + bool "Support for Acer PICA 1 chipset" + depends on MACH_JAZZ select DMA_NONCOHERENT select SYS_SUPPORTS_LITTLE_ENDIAN help @@ -13,7 +13,7 @@ config MIPS_MAGNUM_4000 bool "Support for MIPS Magnum 4000" depends on MACH_JAZZ select DMA_NONCOHERENT - select SYS_SUPPORTS_BIG_ENDIAN if EXPERIMENTAL + select SYS_SUPPORTS_BIG_ENDIAN select SYS_SUPPORTS_LITTLE_ENDIAN help This is a machine with a R4000 100 MHz CPU. To compile a Linux diff --git a/arch/mips/kernel/ftrace.c b/arch/mips/kernel/ftrace.c index 6a2d758dd8e..83fa1460e29 100644 --- a/arch/mips/kernel/ftrace.c +++ b/arch/mips/kernel/ftrace.c @@ -25,6 +25,12 @@ #define MCOUNT_OFFSET_INSNS 4 #endif +/* Arch override because MIPS doesn't need to run this from stop_machine() */ +void arch_ftrace_update_code(int command) +{ + ftrace_modify_all_code(command); +} + /* * Check if the address is in kernel space * @@ -89,6 +95,24 @@ static int ftrace_modify_code(unsigned long ip, unsigned int new_code) return 0; } +#ifndef CONFIG_64BIT +static int ftrace_modify_code_2(unsigned long ip, unsigned int new_code1, + unsigned int new_code2) +{ + int faulted; + + safe_store_code(new_code1, ip, faulted); + if (unlikely(faulted)) + return -EFAULT; + ip += 4; + safe_store_code(new_code2, ip, faulted); + if (unlikely(faulted)) + return -EFAULT; + flush_icache_range(ip, ip + 8); /* original ip + 12 */ + return 0; +} +#endif + /* * The details about the calling site of mcount on MIPS * @@ -131,8 +155,18 @@ int ftrace_make_nop(struct module *mod, * needed. */ new = in_kernel_space(ip) ? INSN_NOP : INSN_B_1F; - +#ifdef CONFIG_64BIT return ftrace_modify_code(ip, new); +#else + /* + * On 32 bit MIPS platforms, gcc adds a stack adjust + * instruction in the delay slot after the branch to + * mcount and expects mcount to restore the sp on return. + * This is based on a legacy API and does nothing but + * waste instructions so it's being removed at runtime. + */ + return ftrace_modify_code_2(ip, new, INSN_NOP); +#endif } int ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr) diff --git a/arch/mips/kernel/mcount.S b/arch/mips/kernel/mcount.S index 4c968e7efb7..16586767335 100644 --- a/arch/mips/kernel/mcount.S +++ b/arch/mips/kernel/mcount.S @@ -46,9 +46,8 @@ PTR_L a5, PT_R9(sp) PTR_L a6, PT_R10(sp) PTR_L a7, PT_R11(sp) - PTR_ADDIU sp, PT_SIZE #else - PTR_ADDIU sp, (PT_SIZE + 8) + PTR_ADDIU sp, PT_SIZE #endif .endm @@ -69,7 +68,9 @@ NESTED(ftrace_caller, PT_SIZE, ra) .globl _mcount _mcount: b ftrace_stub - nop + addiu sp,sp,8 + + /* When tracing is activated, it calls ftrace_caller+8 (aka here) */ lw t1, function_trace_stop bnez t1, ftrace_stub nop diff --git a/arch/mips/kernel/vpe.c b/arch/mips/kernel/vpe.c index eec690af658..147cec19621 100644 --- a/arch/mips/kernel/vpe.c +++ b/arch/mips/kernel/vpe.c @@ -705,7 +705,7 @@ static int vpe_run(struct vpe * v) printk(KERN_WARNING "VPE loader: TC %d is already in use.\n", - t->index); + v->tc->index); return -ENOEXEC; } } else { diff --git a/arch/mips/lantiq/irq.c b/arch/mips/lantiq/irq.c index f36acd1b380..a7935bf0fec 100644 --- a/arch/mips/lantiq/irq.c +++ b/arch/mips/lantiq/irq.c @@ -408,7 +408,7 @@ int __init icu_of_init(struct device_node *node, struct device_node *parent) #endif /* tell oprofile which irq to use */ - cp0_perfcount_irq = LTQ_PERF_IRQ; + cp0_perfcount_irq = irq_create_mapping(ltq_domain, LTQ_PERF_IRQ); /* * if the timer irq is not one of the mips irqs we need to diff --git a/arch/mips/lantiq/xway/dma.c b/arch/mips/lantiq/xway/dma.c index e44a1866653..08f7ebd9c77 100644 --- a/arch/mips/lantiq/xway/dma.c +++ b/arch/mips/lantiq/xway/dma.c @@ -21,6 +21,7 @@ #include <linux/dma-mapping.h> #include <linux/module.h> #include <linux/clk.h> +#include <linux/err.h> #include <lantiq_soc.h> #include <xway_dma.h> @@ -223,8 +224,8 @@ ltq_dma_init(struct platform_device *pdev) panic("Failed to get dma resource"); /* remap dma register range */ - ltq_dma_membase = devm_request_and_ioremap(&pdev->dev, res); - if (!ltq_dma_membase) + ltq_dma_membase = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(ltq_dma_membase)) panic("Failed to remap dma resource"); /* power up and reset the dma engine */ diff --git a/arch/mips/lantiq/xway/gptu.c b/arch/mips/lantiq/xway/gptu.c index e30b1ed1b93..9861c8669fa 100644 --- a/arch/mips/lantiq/xway/gptu.c +++ b/arch/mips/lantiq/xway/gptu.c @@ -150,11 +150,9 @@ static int gptu_probe(struct platform_device *pdev) } /* remap gptu register range */ - gptu_membase = devm_request_and_ioremap(&pdev->dev, res); - if (!gptu_membase) { - dev_err(&pdev->dev, "Failed to remap resource\n"); - return -ENOMEM; - } + gptu_membase = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(gptu_membase)) + return PTR_ERR(gptu_membase); /* enable our clock */ clk = clk_get(&pdev->dev, NULL); diff --git a/arch/mips/lib/delay.c b/arch/mips/lib/delay.c index dc81ca8dc0d..288f7954988 100644 --- a/arch/mips/lib/delay.c +++ b/arch/mips/lib/delay.c @@ -21,7 +21,7 @@ void __delay(unsigned long loops) " .set noreorder \n" " .align 3 \n" "1: bnez %0, 1b \n" -#if __SIZEOF_LONG__ == 4 +#if BITS_PER_LONG == 32 " subu %0, 1 \n" #else " dsubu %0, 1 \n" diff --git a/arch/mips/mm/ioremap.c b/arch/mips/mm/ioremap.c index 7657fd21cd3..cacfd31e8ec 100644 --- a/arch/mips/mm/ioremap.c +++ b/arch/mips/mm/ioremap.c @@ -190,9 +190,3 @@ void __iounmap(const volatile void __iomem *addr) EXPORT_SYMBOL(__ioremap); EXPORT_SYMBOL(__iounmap); - -int __virt_addr_valid(const volatile void *kaddr) -{ - return pfn_valid(PFN_DOWN(virt_to_phys(kaddr))); -} -EXPORT_SYMBOL_GPL(__virt_addr_valid); diff --git a/arch/mips/mm/mmap.c b/arch/mips/mm/mmap.c index d9be7540a6b..7e5fe2790d8 100644 --- a/arch/mips/mm/mmap.c +++ b/arch/mips/mm/mmap.c @@ -192,3 +192,9 @@ unsigned long arch_randomize_brk(struct mm_struct *mm) return ret; } + +int __virt_addr_valid(const volatile void *kaddr) +{ + return pfn_valid(PFN_DOWN(virt_to_phys(kaddr))); +} +EXPORT_SYMBOL_GPL(__virt_addr_valid); diff --git a/arch/mips/netlogic/xlr/setup.c b/arch/mips/netlogic/xlr/setup.c index 4e7f49d3d5a..c5ce6992ac4 100644 --- a/arch/mips/netlogic/xlr/setup.c +++ b/arch/mips/netlogic/xlr/setup.c @@ -193,8 +193,11 @@ static void nlm_init_node(void) void __init prom_init(void) { - int i, *argv, *envp; /* passed as 32 bit ptrs */ + int *argv, *envp; /* passed as 32 bit ptrs */ struct psb_info *prom_infop; +#ifdef CONFIG_SMP + int i; +#endif /* truncate to 32 bit and sign extend all args */ argv = (int *)(long)(int)fw_arg1; diff --git a/arch/mips/pci/pci-ar71xx.c b/arch/mips/pci/pci-ar71xx.c index 1552522b871..6eaa4f2d0e3 100644 --- a/arch/mips/pci/pci-ar71xx.c +++ b/arch/mips/pci/pci-ar71xx.c @@ -24,7 +24,7 @@ #include <asm/mach-ath79/pci.h> #define AR71XX_PCI_MEM_BASE 0x10000000 -#define AR71XX_PCI_MEM_SIZE 0x08000000 +#define AR71XX_PCI_MEM_SIZE 0x07000000 #define AR71XX_PCI_WIN0_OFFS 0x10000000 #define AR71XX_PCI_WIN1_OFFS 0x11000000 diff --git a/arch/mips/pci/pci-ar724x.c b/arch/mips/pci/pci-ar724x.c index 86d77a66645..c11c75be2d7 100644 --- a/arch/mips/pci/pci-ar724x.c +++ b/arch/mips/pci/pci-ar724x.c @@ -21,7 +21,7 @@ #define AR724X_PCI_CTRL_SIZE 0x100 #define AR724X_PCI_MEM_BASE 0x10000000 -#define AR724X_PCI_MEM_SIZE 0x08000000 +#define AR724X_PCI_MEM_SIZE 0x04000000 #define AR724X_PCI_REG_RESET 0x18 #define AR724X_PCI_REG_INT_STATUS 0x4c diff --git a/arch/mips/pci/pci-lantiq.c b/arch/mips/pci/pci-lantiq.c index 95681789b51..910fb4c20b9 100644 --- a/arch/mips/pci/pci-lantiq.c +++ b/arch/mips/pci/pci-lantiq.c @@ -214,13 +214,13 @@ static int ltq_pci_probe(struct platform_device *pdev) return -EINVAL; } - ltq_pci_membase = devm_request_and_ioremap(&pdev->dev, res_bridge); - ltq_pci_mapped_cfg = devm_request_and_ioremap(&pdev->dev, res_cfg); + ltq_pci_membase = devm_ioremap_resource(&pdev->dev, res_bridge); + if (IS_ERR(ltq_pci_membase)) + return PTR_ERR(ltq_pci_membase); - if (!ltq_pci_membase || !ltq_pci_mapped_cfg) { - dev_err(&pdev->dev, "failed to remap resources\n"); - return -ENOMEM; - } + ltq_pci_mapped_cfg = devm_ioremap_resource(&pdev->dev, res_cfg); + if (IS_ERR(ltq_pci_mapped_cfg)) + return PTR_ERR(ltq_pci_mapped_cfg); ltq_pci_startup(pdev); diff --git a/arch/mips/sgi-ip27/Kconfig b/arch/mips/sgi-ip27/Kconfig index 4b2ea282b9c..4d8705a65e4 100644 --- a/arch/mips/sgi-ip27/Kconfig +++ b/arch/mips/sgi-ip27/Kconfig @@ -13,7 +13,6 @@ config SGI_SN_M_MODE config SGI_SN_N_MODE bool "IP27 N-Mode" - depends on EXPERIMENTAL help The nodes of Origin, Onyx, Fuel and Tezro systems can be configured in either N-Modes which allows for more nodes or M-Mode which allows diff --git a/arch/mips/sni/a20r.c b/arch/mips/sni/a20r.c index 9cb9d43a3a0..e05ad4da44d 100644 --- a/arch/mips/sni/a20r.c +++ b/arch/mips/sni/a20r.c @@ -118,7 +118,7 @@ static struct resource sc26xx_rsrc[] = { } }; -#include <linux/platform_data/sccnxp.h> +#include <linux/platform_data/serial-sccnxp.h> static struct sccnxp_pdata sccnxp_data = { .reg_shift = 2, |