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authorPeter Hurley <peter@hurleysoftware.com>2012-11-21 17:30:50 +0100
committerSamuel Ortiz <sameo@linux.intel.com>2012-11-21 17:31:20 +0100
commite294bc91760e11d2f1ebbac1d0a979069edf7adb (patch)
tree279a8a95fb56cc8f230ebab079c1e7a07dba23ab /drivers/mfd/lpc_ich.c
parentd640e757949e2991215838c0edbfd6afc37e5b06 (diff)
mfd: lpc_ich: Fix resource request for [mem 0x00000000]
The older southbridges supported by the lpc_ich driver do not provide memory-mapped space of the root complex. The driver correctly avoids computing the iomem address in this case, yet submits a zeroed resource request anyway (via mfd_add_devices()). Remove the iomem resource from the resource array submitted to the mfd core for the older southbridges. Acked-by: Aaron Sierra <asierra@xes-inc.com> Cc: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Peter Hurley <peter@hurleysoftware.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
Diffstat (limited to 'drivers/mfd/lpc_ich.c')
-rw-r--r--drivers/mfd/lpc_ich.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/drivers/mfd/lpc_ich.c b/drivers/mfd/lpc_ich.c
index a22544fe531..afb2f77a9ae 100644
--- a/drivers/mfd/lpc_ich.c
+++ b/drivers/mfd/lpc_ich.c
@@ -830,7 +830,10 @@ static int __devinit lpc_ich_init_wdt(struct pci_dev *dev,
* we have to read RCBA from PCI Config space 0xf0 and use
* it as base. GCS = RCBA + ICH6_GCS(0x3410).
*/
- if (lpc_chipset_info[id->driver_data].iTCO_version == 2) {
+ if (lpc_chipset_info[id->driver_data].iTCO_version == 1) {
+ /* Don't register iomem for TCO ver 1 */
+ lpc_ich_cells[LPC_WDT].num_resources--;
+ } else {
pci_read_config_dword(dev, RCBABASE, &base_addr_cfg);
base_addr = base_addr_cfg & 0xffffc000;
if (!(base_addr_cfg & 1)) {