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authorNiklas Söderlund <niklas.soderlund@ericsson.com>2011-12-09 13:12:15 -0300
committerMauro Carvalho Chehab <mchehab@redhat.com>2012-03-21 15:22:49 -0300
commitdf95e42e1f20a561f2fe0a632d5b8fd6c26f1bb9 (patch)
treefb323ff0928be60180c0fa6e069111de9361bb4b /drivers/edac/i5400_edac.c
parentb6378cb3e545912a19e6355aa9171326fdc004d8 (diff)
edac: i5100 ack error detection register after each read
If I only ack the detection register after a error have been detected I'm unable to reliably detect errors. I have verified this behavior using both an error injection DIMM and software to inject errors. I can't find any documentation supporting this behavior in Intel 5100 Memory Controller Hub Chipset, see 1. So this is all based on experimentation. [1] Intel® 5100 Memory Controller Hub Chipset http://www.intel.com/content/dam/doc/datasheet/5100- memory-controller-hub-chipset-datasheet.pdf Signed-off-by: Niklas Söderlund <niklas.soderlund@ericsson.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'drivers/edac/i5400_edac.c')
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