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authorMichael Neuling <mikey@neuling.org>2008-06-26 17:07:48 +1000
committerPaul Mackerras <paulus@samba.org>2008-07-01 11:28:43 +1000
commit9c75a31c3525a127f70b919856e32be3d8b03755 (patch)
tree3beee76d3dd4a55af868b5edfbef80c911819fed /arch/powerpc/math-emu
parent9e7511861c4f8d35852a3721c5bcd92661cb4c9f (diff)
downloadlinaro-lsk-9c75a31c3525a127f70b919856e32be3d8b03755.tar.gz
powerpc: Add macros to access floating point registers in thread_struct.
We are going to change where the floating point registers are stored in the thread_struct, so in preparation add some macros to access the floating point registers. Update all code to use these new macros. Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/powerpc/math-emu')
-rw-r--r--arch/powerpc/math-emu/math.c56
1 files changed, 28 insertions, 28 deletions
diff --git a/arch/powerpc/math-emu/math.c b/arch/powerpc/math-emu/math.c
index 381306bb159..29e545e0272 100644
--- a/arch/powerpc/math-emu/math.c
+++ b/arch/powerpc/math-emu/math.c
@@ -230,14 +230,14 @@ do_mathemu(struct pt_regs *regs)
case LFD:
idx = (insn >> 16) & 0x1f;
sdisp = (insn & 0xffff);
- op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f];
+ op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);
op1 = (void *)((idx ? regs->gpr[idx] : 0) + sdisp);
lfd(op0, op1, op2, op3);
break;
case LFDU:
idx = (insn >> 16) & 0x1f;
sdisp = (insn & 0xffff);
- op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f];
+ op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);
op1 = (void *)((idx ? regs->gpr[idx] : 0) + sdisp);
lfd(op0, op1, op2, op3);
regs->gpr[idx] = (unsigned long)op1;
@@ -245,21 +245,21 @@ do_mathemu(struct pt_regs *regs)
case STFD:
idx = (insn >> 16) & 0x1f;
sdisp = (insn & 0xffff);
- op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f];
+ op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);
op1 = (void *)((idx ? regs->gpr[idx] : 0) + sdisp);
stfd(op0, op1, op2, op3);
break;
case STFDU:
idx = (insn >> 16) & 0x1f;
sdisp = (insn & 0xffff);
- op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f];
+ op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);
op1 = (void *)((idx ? regs->gpr[idx] : 0) + sdisp);
stfd(op0, op1, op2, op3);
regs->gpr[idx] = (unsigned long)op1;
break;
case OP63:
- op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f];
- op1 = (void *)&current->thread.fpr[(insn >> 11) & 0x1f];
+ op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);
+ op1 = (void *)&current->thread.TS_FPR((insn >> 11) & 0x1f);
fmr(op0, op1, op2, op3);
break;
default:
@@ -356,28 +356,28 @@ do_mathemu(struct pt_regs *regs)
switch (type) {
case AB:
- op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f];
- op1 = (void *)&current->thread.fpr[(insn >> 16) & 0x1f];
- op2 = (void *)&current->thread.fpr[(insn >> 11) & 0x1f];
+ op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);
+ op1 = (void *)&current->thread.TS_FPR((insn >> 16) & 0x1f);
+ op2 = (void *)&current->thread.TS_FPR((insn >> 11) & 0x1f);
break;
case AC:
- op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f];
- op1 = (void *)&current->thread.fpr[(insn >> 16) & 0x1f];
- op2 = (void *)&current->thread.fpr[(insn >> 6) & 0x1f];
+ op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);
+ op1 = (void *)&current->thread.TS_FPR((insn >> 16) & 0x1f);
+ op2 = (void *)&current->thread.TS_FPR((insn >> 6) & 0x1f);
break;
case ABC:
- op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f];
- op1 = (void *)&current->thread.fpr[(insn >> 16) & 0x1f];
- op2 = (void *)&current->thread.fpr[(insn >> 11) & 0x1f];
- op3 = (void *)&current->thread.fpr[(insn >> 6) & 0x1f];
+ op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);
+ op1 = (void *)&current->thread.TS_FPR((insn >> 16) & 0x1f);
+ op2 = (void *)&current->thread.TS_FPR((insn >> 11) & 0x1f);
+ op3 = (void *)&current->thread.TS_FPR((insn >> 6) & 0x1f);
break;
case D:
idx = (insn >> 16) & 0x1f;
sdisp = (insn & 0xffff);
- op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f];
+ op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);
op1 = (void *)((idx ? regs->gpr[idx] : 0) + sdisp);
break;
@@ -387,27 +387,27 @@ do_mathemu(struct pt_regs *regs)
goto illegal;
sdisp = (insn & 0xffff);
- op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f];
+ op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);
op1 = (void *)(regs->gpr[idx] + sdisp);
break;
case X:
- op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f];
+ op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);
break;
case XA:
- op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f];
- op1 = (void *)&current->thread.fpr[(insn >> 16) & 0x1f];
+ op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);
+ op1 = (void *)&current->thread.TS_FPR((insn >> 16) & 0x1f);
break;
case XB:
- op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f];
- op1 = (void *)&current->thread.fpr[(insn >> 11) & 0x1f];
+ op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);
+ op1 = (void *)&current->thread.TS_FPR((insn >> 11) & 0x1f);
break;
case XE:
idx = (insn >> 16) & 0x1f;
- op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f];
+ op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);
if (!idx) {
if (((insn >> 1) & 0x3ff) == STFIWX)
op1 = (void *)(regs->gpr[(insn >> 11) & 0x1f]);
@@ -421,7 +421,7 @@ do_mathemu(struct pt_regs *regs)
case XEU:
idx = (insn >> 16) & 0x1f;
- op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f];
+ op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);
op1 = (void *)((idx ? regs->gpr[idx] : 0)
+ regs->gpr[(insn >> 11) & 0x1f]);
break;
@@ -429,8 +429,8 @@ do_mathemu(struct pt_regs *regs)
case XCR:
op0 = (void *)&regs->ccr;
op1 = (void *)((insn >> 23) & 0x7);
- op2 = (void *)&current->thread.fpr[(insn >> 16) & 0x1f];
- op3 = (void *)&current->thread.fpr[(insn >> 11) & 0x1f];
+ op2 = (void *)&current->thread.TS_FPR((insn >> 16) & 0x1f);
+ op3 = (void *)&current->thread.TS_FPR((insn >> 11) & 0x1f);
break;
case XCRL:
@@ -450,7 +450,7 @@ do_mathemu(struct pt_regs *regs)
case XFLB:
op0 = (void *)((insn >> 17) & 0xff);
- op1 = (void *)&current->thread.fpr[(insn >> 11) & 0x1f];
+ op1 = (void *)&current->thread.TS_FPR((insn >> 11) & 0x1f);
break;
default: