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authorMarc Zyngier <marc.zyngier@arm.com>2013-01-02 15:24:22 +0000
committerCatalin Marinas <catalin.marinas@arm.com>2013-01-29 16:56:37 +0000
commitd329de3f2ada413c7cd16e1dc1d70d4abc7309e9 (patch)
treeae7880c26aa4bc2ac1ac5b3b983e992638e49f67 /arch/arm64/include
parent75e424620a4f8247e8877c224d0457efadf88201 (diff)
downloadlinaro-lsk-d329de3f2ada413c7cd16e1dc1d70d4abc7309e9.tar.gz
arm64: SMP: rework the SMP code to be enabling method agnostic
In order to introduce PSCI support, let the SMP code handle multiple enabling methods. This also allow CPUs to be booted using different methods (though this feels a bit weird...). In the process, move the spin-table code to its own file. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm64/include')
-rw-r--r--arch/arm64/include/asm/smp.h10
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm64/include/asm/smp.h b/arch/arm64/include/asm/smp.h
index 7e34295f78e..b1f68c19d17 100644
--- a/arch/arm64/include/asm/smp.h
+++ b/arch/arm64/include/asm/smp.h
@@ -66,4 +66,14 @@ extern volatile unsigned long secondary_holding_pen_release;
extern void arch_send_call_function_single_ipi(int cpu);
extern void arch_send_call_function_ipi_mask(const struct cpumask *mask);
+struct device_node;
+
+struct smp_enable_ops {
+ const char *name;
+ int (*init_cpu)(struct device_node *, int);
+ int (*prepare_cpu)(int);
+};
+
+extern const struct smp_enable_ops smp_spin_table_ops;
+
#endif /* ifndef __ASM_SMP_H */