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authorLinus Torvalds <torvalds@linux-foundation.org>2012-04-28 09:28:43 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2012-04-28 09:28:43 -0700
commitb990f9b3cb068578b8aefd3a34f8c8555661ef95 (patch)
tree091e7f7d62bcc75c244f9cc4615eaab2da6b9991 /arch/arm/mach-pxa/mfp-pxa2xx.c
parentcd88e3a61683d3d13276dda9d0debe5dc43c0727 (diff)
parent6e76538b9ef2b2a14ad9b57d65dc35d151765917 (diff)
Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Olof Johansson: "Nothing controversial, just another batch of fixes: - Samsung/exynos fixes for more merge window fallout: build errors and warnings mostly, but also some clock/device setup issues on exynos4/5 - PXA bug and warning fixes related to gpio and pinmux - IRQ domain conversion bugfixes for U300 and MSM - A regulator setup fix for U300" * tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: ARM: PXA2xx: MFP: fix potential direction bug ARM: PXA2xx: MFP: fix bug with MFP_LPM_KEEP_OUTPUT arm/sa1100: fix sa1100-rtc memory resource ARM: pxa: fix gpio wakeup setting ARM: SAMSUNG: add missing MMC_CAP2_BROKEN_VOLTAGE capability ARM: EXYNOS: Fix compilation error when CONFIG_OF is not defined ARM: EXYNOS: Fix resource on dev-dwmci.c ARM: S3C24XX: Fix build warning for S3C2410_PM ARM: mini2440_defconfig: Fix build error ARM: msm: Fix gic irqdomain support ARM: EXYNOS: Fix incorrect initialization of GIC ARM: EXYNOS: use 'exynos4-sdhci' as device name for sdhci controllers ARM: u300: bump all IRQ numbers by one ARM: ux300: Fix unimplementable regulation constraints
Diffstat (limited to 'arch/arm/mach-pxa/mfp-pxa2xx.c')
-rw-r--r--arch/arm/mach-pxa/mfp-pxa2xx.c21
1 files changed, 19 insertions, 2 deletions
diff --git a/arch/arm/mach-pxa/mfp-pxa2xx.c b/arch/arm/mach-pxa/mfp-pxa2xx.c
index b0a84288778..ef0426a159d 100644
--- a/arch/arm/mach-pxa/mfp-pxa2xx.c
+++ b/arch/arm/mach-pxa/mfp-pxa2xx.c
@@ -33,6 +33,8 @@
#define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))
#define GPLR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5))
#define GPDR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5) + 0x0c)
+#define GPSR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5) + 0x18)
+#define GPCR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5) + 0x24)
#define PWER_WE35 (1 << 24)
@@ -348,6 +350,7 @@ static inline void pxa27x_mfp_init(void) {}
#ifdef CONFIG_PM
static unsigned long saved_gafr[2][4];
static unsigned long saved_gpdr[4];
+static unsigned long saved_gplr[4];
static unsigned long saved_pgsr[4];
static int pxa2xx_mfp_suspend(void)
@@ -366,14 +369,26 @@ static int pxa2xx_mfp_suspend(void)
}
for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++) {
-
saved_gafr[0][i] = GAFR_L(i);
saved_gafr[1][i] = GAFR_U(i);
saved_gpdr[i] = GPDR(i * 32);
+ saved_gplr[i] = GPLR(i * 32);
saved_pgsr[i] = PGSR(i);
- GPDR(i * 32) = gpdr_lpm[i];
+ GPSR(i * 32) = PGSR(i);
+ GPCR(i * 32) = ~PGSR(i);
+ }
+
+ /* set GPDR bits taking into account MFP_LPM_KEEP_OUTPUT */
+ for (i = 0; i < pxa_last_gpio; i++) {
+ if ((gpdr_lpm[gpio_to_bank(i)] & GPIO_bit(i)) ||
+ ((gpio_desc[i].config & MFP_LPM_KEEP_OUTPUT) &&
+ (saved_gpdr[gpio_to_bank(i)] & GPIO_bit(i))))
+ GPDR(i) |= GPIO_bit(i);
+ else
+ GPDR(i) &= ~GPIO_bit(i);
}
+
return 0;
}
@@ -384,6 +399,8 @@ static void pxa2xx_mfp_resume(void)
for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++) {
GAFR_L(i) = saved_gafr[0][i];
GAFR_U(i) = saved_gafr[1][i];
+ GPSR(i * 32) = saved_gplr[i];
+ GPCR(i * 32) = ~saved_gplr[i];
GPDR(i * 32) = saved_gpdr[i];
PGSR(i) = saved_pgsr[i];
}