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authorCatalin Marinas <catalin.marinas@arm.com>2013-07-23 16:15:36 +0100
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2013-08-11 18:35:20 -0700
commit8271eb9ffaaa3390fb0478f94c88f91623b5af78 (patch)
tree29c57b7774dc916dd62f8ccf58439034e2fb76ba /arch/arm/Kconfig
parent340631138430a7ca215ca76ae74ef70f0be7ac20 (diff)
downloadlinaro-lsk-8271eb9ffaaa3390fb0478f94c88f91623b5af78.tar.gz
ARM: 7790/1: Fix deferred mm switch on VIVT processors
commit bdae73cd374e28db544fdd9b77de689a36e3c129 upstream. As of commit b9d4d42ad9 (ARM: Remove __ARCH_WANT_INTERRUPTS_ON_CTXSW on pre-ARMv6 CPUs), the mm switching on VIVT processors is done in the finish_arch_post_lock_switch() function to avoid whole cache flushing with interrupts disabled. The need for deferred mm switch is stored as a thread flag (TIF_SWITCH_MM). However, with preemption enabled, we can have another thread switch before finish_arch_post_lock_switch(). If the new thread has the same mm as the previous 'next' thread, the scheduler will not call switch_mm() and the TIF_SWITCH_MM flag won't be set for the new thread. This patch moves the switch pending flag to the mm_context_t structure since this is specific to the mm rather than thread. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Reported-by: Marc Kleine-Budde <mkl@pengutronix.de> Tested-by: Marc Kleine-Budde <mkl@pengutronix.de> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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