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authorTaras Kondratiuk <taras.kondratiuk@linaro.org>2014-01-10 01:27:08 +0100
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2014-01-25 08:27:12 -0800
commit04545a3a85d0d1b7c3e09adcf5d0aff9d71072f3 (patch)
tree240f1f64d0eb81ffd2a6473514f50caa92696656 /Makefile
parent4b176ae176912fbf9e19ab6313ebf1a4b6bd9b84 (diff)
ARM: 7938/1: OMAP4/highbank: Flush L2 cache before disabling
commit b25f3e1c358434bf850220e04f28eebfc45eb634 upstream. Kexec disables outer cache before jumping to reboot code, but it doesn't flush it explicitly. Flush is done implicitly inside of l2x0_disable(). But some SoC's override default .disable handler and don't flush cache. This may lead to a corrupted memory during Kexec reboot on these platforms. This patch adds cache flush inside of OMAP4 and Highbank outer_cache.disable() handlers to make it consistent with default l2x0_disable(). Acked-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Taras Kondratiuk <taras.kondratiuk@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Cc: Wang Nan <wangnan0@huawei.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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