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authorJon Medhurst <tixy@linaro.org>2013-07-17 12:01:55 +0100
committerJon Medhurst <tixy@linaro.org>2013-07-17 12:01:55 +0100
commita7afdd36a825639ceeaaf4b430585afc1f4b4ade (patch)
tree43bf43eacfefba16a337fbbca6355a44a1e6bc6d /Documentation
parent95106c3b6742a45828bd675ca55e3e378d6d3071 (diff)
parent9ff6b9a38bf6e90f9c6aee94c747c656bea39756 (diff)
Merge branch 'tracking-armlt-spc' into lsk-3.10-vexpress
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/mfd/vexpress-spc.txt35
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diff --git a/Documentation/devicetree/bindings/mfd/vexpress-spc.txt b/Documentation/devicetree/bindings/mfd/vexpress-spc.txt
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+* ARM Versatile Express Serial Power Controller device tree bindings
+
+Latest ARM development boards implement a power management interface (serial
+power controller - SPC) that is capable of managing power/voltage and
+operating point transitions, through memory mapped registers interface.
+
+On testchips like TC2 it also provides a configuration interface that can
+be used to read/write values which cannot be read/written through simple
+memory mapped reads/writes.
+
+- spc node
+
+ - compatible:
+ Usage: required
+ Value type: <stringlist>
+ Definition: must be
+ "arm,vexpress-spc,v2p-ca15_a7","arm,vexpress-spc"
+ - reg:
+ Usage: required
+ Value type: <prop-encode-array>
+ Definition: A standard property that specifies the base address
+ and the size of the SPC address space
+ - interrupts:
+ Usage: required
+ Value type: <prop-encoded-array>
+ Definition: SPC interrupt configuration. A standard property
+ that follows ePAPR interrupts specifications
+
+Example:
+
+spc: spc@7fff0000 {
+ compatible = "arm,vexpress-spc,v2p-ca15_a7","arm,vexpress-spc";
+ reg = <0 0x7FFF0000 0 0x1000>;
+ interrupts = <0 95 4>;
+};