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authorSantosh Shilimkar <santosh.shilimkar@ti.com>2013-02-06 17:54:39 +0530
committerSantosh Shilimkar <santosh.shilimkar@ti.com>2013-03-19 12:57:01 +0530
commitda0e02a1e4a6348505cfe0cbb0d3a2717a2b5476 (patch)
tree7967afab81bc62aac20bcd91657aa4962b86d740
parent077173c0aaac62aef6f55a841f03c7d7001958ab (diff)
downloadlinaro-lsk-da0e02a1e4a6348505cfe0cbb0d3a2717a2b5476.tar.gz
ARM: OMAP5: Update SAR RAM base address
Update SAR RAM base address for OMAP5 based devices. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
-rw-r--r--arch/arm/mach-omap2/omap4-common.c10
-rw-r--r--arch/arm/mach-omap2/omap54xx.h1
2 files changed, 9 insertions, 2 deletions
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c
index 708bb115a27..2aeb928efdf 100644
--- a/arch/arm/mach-omap2/omap4-common.c
+++ b/arch/arm/mach-omap2/omap4-common.c
@@ -240,15 +240,21 @@ void __iomem *omap4_get_sar_ram_base(void)
*/
static int __init omap4_sar_ram_init(void)
{
+ unsigned long sar_base;
+
/*
* To avoid code running on other OMAPs in
* multi-omap builds
*/
- if (!cpu_is_omap44xx())
+ if (cpu_is_omap44xx())
+ sar_base = OMAP44XX_SAR_RAM_BASE;
+ else if (soc_is_omap54xx())
+ sar_base = OMAP54XX_SAR_RAM_BASE;
+ else
return -ENOMEM;
/* Static mapping, never released */
- sar_ram_base = ioremap(OMAP44XX_SAR_RAM_BASE, SZ_16K);
+ sar_ram_base = ioremap(sar_base, SZ_16K);
if (WARN_ON(!sar_ram_base))
return -ENOMEM;
diff --git a/arch/arm/mach-omap2/omap54xx.h b/arch/arm/mach-omap2/omap54xx.h
index a2582bb3cab..a086ba15868 100644
--- a/arch/arm/mach-omap2/omap54xx.h
+++ b/arch/arm/mach-omap2/omap54xx.h
@@ -28,5 +28,6 @@
#define OMAP54XX_PRCM_MPU_BASE 0x48243000
#define OMAP54XX_SCM_BASE 0x4a002000
#define OMAP54XX_CTRL_BASE 0x4a002800
+#define OMAP54XX_SAR_RAM_BASE 0x4ae26000
#endif /* __ASM_SOC_OMAP555554XX_H */