From 3e16c0e54562236ee2de2bd7157ead187c7a90c0 Mon Sep 17 00:00:00 2001 From: Per Fransson Date: Thu, 17 Mar 2011 13:46:12 +0100 Subject: ARM: ux500: Make it possible to force DDR and APE OPP Forces the OPPs to the values written, regardless of the QoS requirements. echo 25 > /debugfs/prcmu/ddr_opp echo 50 > /debugfs/prcmu/ddr_opp echo 100 > /debugfs/prcmu/ddr_opp echo 50 > /debugfs/prcmu/ape_opp echo 100 > /debugfs/prcmu/ape_opp ST-Ericsson ID: CR 323730 Change-Id: I5fd18e254f3da5342a17cd207b0ee94da0a8cc28 Signed-off-by: Per Fransson Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/18702 Reviewed-by: Martin PERSSON --- arch/arm/mach-ux500/include/mach/prcmu-fw-api.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'arch/arm/mach-ux500/include') diff --git a/arch/arm/mach-ux500/include/mach/prcmu-fw-api.h b/arch/arm/mach-ux500/include/mach/prcmu-fw-api.h index bc7764fc1d9..630e4c6ace7 100644 --- a/arch/arm/mach-ux500/include/mach/prcmu-fw-api.h +++ b/arch/arm/mach-ux500/include/mach/prcmu-fw-api.h @@ -257,6 +257,7 @@ int prcmu_set_ddr_opp(u8 opp); int prcmu_get_ddr_opp(void); unsigned long prcmu_qos_get_cpufreq_opp_delay(void); void prcmu_qos_set_cpufreq_opp_delay(unsigned long); +void prcmu_qos_force_opp(int, s32); /* NOTE! Use regulator framework instead */ int prcmu_set_hwacc(u16 hw_acc_dev, u8 state); int prcmu_set_epod(u16 epod_id, u8 epod_state); @@ -369,6 +370,8 @@ static inline unsigned long prcmu_qos_get_cpufreq_opp_delay(void) static inline void prcmu_qos_set_cpufreq_opp_delay(unsigned long n) {} +void prcmu_qos_force_opp(int prcmu_qos_class, s32 i) {} + static inline int prcmu_set_hwacc(u16 hw_acc_dev, u8 state) { return 0; -- cgit v1.2.3