aboutsummaryrefslogtreecommitdiff
path: root/arch
diff options
context:
space:
mode:
authorWill Deacon <will.deacon@arm.com>2011-04-05 13:57:53 +0100
committerGreg Kroah-Hartman <gregkh@suse.de>2011-04-21 14:32:47 -0700
commitc421122f3dea5b5c42133f67a8084e6c0793a35c (patch)
tree74df166cd379e090d49f562f17e5c23782971de9 /arch
parent0b76f8fcb3f302aaf18c65337a472b32d8a74b67 (diff)
downloadlinux-2.6.38-lt-ux500-c421122f3dea5b5c42133f67a8084e6c0793a35c.tar.gz
ARM: 6864/1: hw_breakpoint: clear DBGVCR out of reset
commit e89c0d7090c54d7b11b9b091e495a1ae345dd3ff upstream. The DBGVCR, used for configuring vector catch debug events, is UNKNOWN out of reset on ARMv7. When enabling monitor mode, this must be zeroed to avoid UNPREDICTABLE behaviour. This patch adds the zeroing code to the debug reset path. Reported-by: Stepan Moskovchenko <stepanm@codeaurora.org> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/kernel/hw_breakpoint.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/kernel/hw_breakpoint.c b/arch/arm/kernel/hw_breakpoint.c
index 44b84fe6e1b..7e9a0c7f198 100644
--- a/arch/arm/kernel/hw_breakpoint.c
+++ b/arch/arm/kernel/hw_breakpoint.c
@@ -868,6 +868,13 @@ static void reset_ctrl_regs(void *info)
*/
asm volatile("mcr p14, 0, %0, c1, c0, 4" : : "r" (0));
isb();
+
+ /*
+ * Clear any configured vector-catch events before
+ * enabling monitor mode.
+ */
+ asm volatile("mcr p14, 0, %0, c0, c7, 0" : : "r" (0));
+ isb();
}
if (enable_monitor_mode())