diff options
| author | Gerhard Pircher <gerhard_pircher@gmx.net> | 2009-06-06 11:12:36 +0000 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2009-06-15 21:45:31 -0500 |
| commit | f1f8b4948d19ae84fe37e36601ae064102dfa5ab (patch) | |
| tree | 227f9c3d01e2f200496a3765df0a802f17be74bf /arch/powerpc/kernel/cpu_setup_6xx.S | |
| parent | b7d66c88c968379ebe683a28c4005895497ebbad (diff) | |
powerpc: Enable additional BAT registers in setup_745x_specifics()
Currently the kernel expects the additional four IBAT and DBAT registers
to be available, but doesn't enable these registers on 745x CPUs, which
have them disabled after reset. Thus set the HIGH_BAT_EN bit in HID0
register, if the corresponding MMU feature is defined.
Signed-off-by: Gerhard Pircher <gerhard_pircher@gmx.net>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/kernel/cpu_setup_6xx.S')
| -rw-r--r-- | arch/powerpc/kernel/cpu_setup_6xx.S | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/powerpc/kernel/cpu_setup_6xx.S b/arch/powerpc/kernel/cpu_setup_6xx.S index 54f767e31a1..1e9949e6885 100644 --- a/arch/powerpc/kernel/cpu_setup_6xx.S +++ b/arch/powerpc/kernel/cpu_setup_6xx.S @@ -239,6 +239,9 @@ END_FTR_SECTION_IFSET(CPU_FTR_L3CR) ori r11,r11,HID0_SGE | HID0_FOLD | HID0_BHTE ori r11,r11,HID0_LRSTK | HID0_BTIC oris r11,r11,HID0_DPM@h +BEGIN_MMU_FTR_SECTION + oris r11,r11,HID0_HIGH_BAT@h +END_MMU_FTR_SECTION_IFSET(MMU_FTR_USE_HIGH_BATS) BEGIN_FTR_SECTION xori r11,r11,HID0_BTIC END_FTR_SECTION_IFSET(CPU_FTR_NO_BTIC) |