aboutsummaryrefslogtreecommitdiff
path: root/arch/arm/mach-omap2/pm34xx.c
diff options
context:
space:
mode:
authorAvik Sil <avik.sil@linaro.org>2011-03-31 11:06:38 +0000
committerAvik Sil <avik.sil@linaro.org>2011-03-31 11:06:38 +0000
commitebb688e3183bd5891312bdb8f4e2f520d70b36b6 (patch)
treec30d1abefaccc8cd1baa4944aae3348668e13bde /arch/arm/mach-omap2/pm34xx.c
parent8061f3a885ec3538bf405ff3957c205b1ab2aae4 (diff)
parentb2afcd30fff4c24290a63a2497de301864d9726d (diff)
Merge remote branch 'lttng/2.6.38-lttng-0.247'
Conflicts: arch/arm/kernel/traps.c arch/arm/mach-omap2/clock34xx.c arch/arm/mach-omap2/pm34xx.c
Diffstat (limited to 'arch/arm/mach-omap2/pm34xx.c')
-rw-r--r--arch/arm/mach-omap2/pm34xx.c29
1 files changed, 28 insertions, 1 deletions
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 0c5e3a46a3a..5b75fabb9d9 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -30,6 +30,7 @@
#include <linux/slab.h>
#include <linux/console.h>
#include <trace/events/power.h>
+#include <trace/pm.h>
#include <plat/sram.h>
#include "clockdomain.h"
@@ -42,6 +43,8 @@
#include <asm/tlbflush.h>
+#include <asm/trace-clock.h>
+
#include "cm2xxx_3xxx.h"
#include "cm-regbits-34xx.h"
#include "prm-regbits-34xx.h"
@@ -81,6 +84,11 @@ struct power_state {
struct list_head node;
};
+DEFINE_TRACE(pm_idle_entry);
+DEFINE_TRACE(pm_idle_exit);
+DEFINE_TRACE(pm_suspend_entry);
+DEFINE_TRACE(pm_suspend_exit);
+
static LIST_HEAD(pwrst_list);
static void (*_omap_sram_idle)(u32 *addr, int save_state);
@@ -515,6 +523,9 @@ static void omap3_pm_idle(void)
if (omap_irq_pending() || need_resched())
goto out;
+ trace_pm_idle_entry();
+ save_sync_trace_clock();
+
trace_power_start(POWER_CSTATE, 1, smp_processor_id());
trace_cpu_idle(1, smp_processor_id());
@@ -523,6 +534,18 @@ static void omap3_pm_idle(void)
trace_power_end(smp_processor_id());
trace_cpu_idle(PWR_EVENT_EXIT, smp_processor_id());
+ /*
+ * Resyncing the trace clock should ideally be done much sooner. When
+ * we arrive here, there are already some interrupt handlers which have
+ * run before us, using potentially wrong timestamps. This leads
+ * to problems when restarting the clock (and synchronizing on the 32k
+ * clock) if the cycle counter was still active.
+ * resync_track_clock must ensure that timestamps never ever go
+ * backward.
+ */
+ resync_trace_clock();
+ trace_pm_idle_exit();
+
out:
local_fiq_enable();
local_irq_enable();
@@ -552,7 +575,11 @@ static int omap3_pm_suspend(void)
omap_uart_prepare_suspend();
omap3_intc_suspend();
- omap_sram_idle();
+ trace_pm_suspend_entry();
+ save_sync_trace_clock();
+ omap_sram_idle();
+ resync_trace_clock();
+ trace_pm_suspend_exit();
restore:
/* Restore next_pwrsts */