From 5ee823507b3c7d2187df2160125a4f64232d3a60 Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Tue, 23 May 2006 16:37:32 +0100 Subject: [MIPS] Fix instable BogoMIPS on multi-issue processors. Increase alignment of BogoMIPS loop to 8 bytes. Having the delay loop overlap cache line boundaries may cause instable delays. Signed-off-by: Ralf Baechle --- include/asm-mips/delay.h | 22 ++++++++++++---------- 1 file changed, 12 insertions(+), 10 deletions(-) (limited to 'include') diff --git a/include/asm-mips/delay.h b/include/asm-mips/delay.h index 64dd45150f6..928f30f8c45 100644 --- a/include/asm-mips/delay.h +++ b/include/asm-mips/delay.h @@ -19,20 +19,22 @@ static inline void __delay(unsigned long loops) { if (sizeof(long) == 4) __asm__ __volatile__ ( - ".set\tnoreorder\n" - "1:\tbnez\t%0,1b\n\t" - "subu\t%0,1\n\t" - ".set\treorder" + " .set noreorder \n" + " .align 3 \n" + "1: bnez %0, 1b \n" + " subu %0, 1 \n" + " .set reorder \n" : "=r" (loops) : "0" (loops)); else if (sizeof(long) == 8) __asm__ __volatile__ ( - ".set\tnoreorder\n" - "1:\tbnez\t%0,1b\n\t" - "dsubu\t%0,1\n\t" - ".set\treorder" - :"=r" (loops) - :"0" (loops)); + " .set noreorder \n" + " .align 3 \n" + "1: bnez %0, 1b \n" + " dsubu %0, 1 \n" + " .set reorder \n" + : "=r" (loops) + : "0" (loops)); } -- cgit v1.2.3