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Diffstat (limited to 'arch/mips/alchemy/devboards/pb1200/irqmap.c')
-rw-r--r--arch/mips/alchemy/devboards/pb1200/irqmap.c71
1 files changed, 1 insertions, 70 deletions
diff --git a/arch/mips/alchemy/devboards/pb1200/irqmap.c b/arch/mips/alchemy/devboards/pb1200/irqmap.c
index f379b02213f..3beb8046667 100644
--- a/arch/mips/alchemy/devboards/pb1200/irqmap.c
+++ b/arch/mips/alchemy/devboards/pb1200/irqmap.c
@@ -45,69 +45,11 @@ struct au1xxx_irqmap __initdata au1xxx_irq_map[] = {
{ AU1000_GPIO_7, IRQF_TRIGGER_LOW, 0 },
};
-static void __iomem *bcsr_virt;
-
-/*
- * Support for External interrupts on the Pb1200 Development platform.
- */
-
-static void pb1200_cascade_handler(unsigned int irq, struct irq_desc *d)
-{
- unsigned short bisr = __raw_readw(bcsr_virt + BCSR_REG_INTSTAT);
-
- for ( ; bisr; bisr &= bisr - 1)
- generic_handle_irq(PB1200_INT_BEGIN + __ffs(bisr));
-}
-
-/* NOTE: both the enable and mask bits must be cleared, otherwise the
- * CPLD generates tons of spurious interrupts (at least on the DB1200).
- */
-static void pb1200_mask_irq(unsigned int irq_nr)
-{
- unsigned short v = 1 << (irq_nr - PB1200_INT_BEGIN);
- __raw_writew(v, bcsr_virt + BCSR_REG_INTCLR);
- __raw_writew(v, bcsr_virt + BCSR_REG_MASKCLR);
- wmb();
-}
-
-static void pb1200_maskack_irq(unsigned int irq_nr)
-{
- unsigned short v = 1 << (irq_nr - PB1200_INT_BEGIN);
- __raw_writew(v, bcsr_virt + BCSR_REG_INTCLR);
- __raw_writew(v, bcsr_virt + BCSR_REG_MASKCLR);
- __raw_writew(v, bcsr_virt + BCSR_REG_INTSTAT); /* ack */
- wmb();
-}
-
-static void pb1200_unmask_irq(unsigned int irq_nr)
-{
- unsigned short v = 1 << (irq_nr - PB1200_INT_BEGIN);
- __raw_writew(v, bcsr_virt + BCSR_REG_INTSET);
- __raw_writew(v, bcsr_virt + BCSR_REG_MASKSET);
- wmb();
-}
-
-static struct irq_chip pb1200_cpld_irq_type = {
-#ifdef CONFIG_MIPS_PB1200
- .name = "Pb1200 Ext",
-#endif
-#ifdef CONFIG_MIPS_DB1200
- .name = "Db1200 Ext",
-#endif
- .mask = pb1200_mask_irq,
- .mask_ack = pb1200_maskack_irq,
- .unmask = pb1200_unmask_irq,
-};
-
void __init board_init_irq(void)
{
- unsigned int irq;
-
au1xxx_setup_irqmap(au1xxx_irq_map, ARRAY_SIZE(au1xxx_irq_map));
#ifdef CONFIG_MIPS_PB1200
- bcsr_virt = (void __iomem *)KSEG1ADDR(PB1200_BCSR_PHYS_ADDR);
-
/* We have a problem with CPLD rev 3. */
if (BCSR_WHOAMI_CPLD(bcsr_read(BCSR_WHOAMI)) <= 3) {
printk(KERN_ERR "WARNING!!!\n");
@@ -127,18 +69,7 @@ void __init board_init_irq(void)
printk(KERN_ERR "WARNING!!!\n");
panic("Game over. Your score is 0.");
}
-#else
- bcsr_virt = (void __iomem *)KSEG1ADDR(DB1200_BCSR_PHYS_ADDR);
#endif
- /* mask & disable & ack all */
- bcsr_write(BCSR_INTCLR, 0xffff);
- bcsr_write(BCSR_MASKCLR, 0xffff);
- bcsr_write(BCSR_INTSTAT, 0xffff);
-
- for (irq = PB1200_INT_BEGIN; irq <= PB1200_INT_END; irq++)
- set_irq_chip_and_handler_name(irq, &pb1200_cpld_irq_type,
- handle_level_irq, "level");
-
- set_irq_chained_handler(AU1000_GPIO_7, pb1200_cascade_handler);
+ bcsr_init_irq(PB1200_INT_BEGIN, PB1200_INT_END, AU1000_GPIO_7);
}