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authorBruce Allan <bruce.w.allan@intel.com>2010-07-27 12:28:46 +0000
committerGreg Kroah-Hartman <gregkh@suse.de>2010-08-10 11:09:16 -0700
commit0c41742f8b41c3fd81f96bffc8c65bbb1f0a0d8b (patch)
treefe17acd1470f3efba91771cab1215776c450d1a7 /net
parenta436d816e9abf39ecc1cf3df6c99457caf94453d (diff)
downloadlinux-2.6.34-ux500-0c41742f8b41c3fd81f96bffc8c65bbb1f0a0d8b.tar.gz
e1000e: 82577/82578 PHY register access issues
commit ff847ac2d3e90edd94674c28bade25ae1e6a2e49 upstream. The MAC-PHY interconnect on 82577/82578 uses a power management feature (called K1) which must be disabled when in 1Gbps due to a hardware issue on these parts. The #define bit setting used to enable/disable K1 is incorrect and can cause PHY register accesses to stop working altogether until the next device reset. This patch sets the register correctly. This issue is present in kernels since 2.6.32. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Tested-by: Jeff Pieper <jeffrey.e.pieper@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'net')
0 files changed, 0 insertions, 0 deletions