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authorDeepak Saxena <dsaxena@plexity.net>2006-05-31 16:14:05 -0700
committerLinus Torvalds <torvalds@g5.osdl.org>2006-05-31 16:27:44 -0700
commit5cedae9ca752a43cfb1074907d12c9f01fbebd45 (patch)
tree30bff4b8211984984c6614b7fc530ff916630d6b /include/asm-arm
parent29f767a254be8fd44fb5d2b5a48e9cda8399c4ea (diff)
downloadlinux-2.6.34-ux500-5cedae9ca752a43cfb1074907d12c9f01fbebd45.tar.gz
[PATCH] ARM: Fix XScale PMD setting
The ARM Architecture Reference Manual lists bit 4 of the PMD as "implementation defined" and it must be set to zero on Intel XScale CPUs or the cache does not behave properly. Found by Mike Rapoport while debugging a flash issue on the PXA255: http://marc.10east.com/?l=linux-arm-kernel&m=114845287600782&w=1 Signed-off-by: Deepak Saxena <dsaxena@plexity.net> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'include/asm-arm')
-rw-r--r--include/asm-arm/system.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/include/asm-arm/system.h b/include/asm-arm/system.h
index 95b3abf4851..7c9568d3030 100644
--- a/include/asm-arm/system.h
+++ b/include/asm-arm/system.h
@@ -127,6 +127,12 @@ static inline int cpu_is_xsc3(void)
}
#endif
+#if !defined(CONFIG_CPU_XSCALE) && !defined(CONFIG_CPU_XSC3)
+#define cpu_is_xscale() 0
+#else
+#define cpu_is_xscale() 1
+#endif
+
#define set_cr(x) \
__asm__ __volatile__( \
"mcr p15, 0, %0, c1, c0, 0 @ set CR" \