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authorDan Williams <dan.j.williams@intel.com>2007-02-13 17:13:04 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2007-02-17 15:04:53 +0000
commit4434c5c7fd61c6713de882a2272b66f32fe7cac3 (patch)
treef20c9c4eba18dd915f07185cee5ededf33e28c02 /arch/arm/plat-iop
parentf80dff9da07d81da16e3b842118d47b9febf9c01 (diff)
[ARM] 4186/1: iop: remove cp6_enable/disable routines
This functionality is replaced by cp6_trap Signed-off-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/plat-iop')
-rw-r--r--arch/arm/plat-iop/time.c4
1 files changed, 0 insertions, 4 deletions
diff --git a/arch/arm/plat-iop/time.c b/arch/arm/plat-iop/time.c
index f530abdaa7a..0d53b813cbb 100644
--- a/arch/arm/plat-iop/time.c
+++ b/arch/arm/plat-iop/time.c
@@ -51,9 +51,7 @@ iop3xx_timer_interrupt(int irq, void *dev_id)
{
write_seqlock(&xtime_lock);
- iop3xx_cp6_enable();
asm volatile("mcr p6, 0, %0, c6, c1, 0" : : "r" (1));
- iop3xx_cp6_disable();
while ((signed long)(next_jiffy_time - *IOP3XX_TU_TCR1)
>= ticks_per_jiffy) {
@@ -87,12 +85,10 @@ void __init iop3xx_init_time(unsigned long tick_rate)
* We use timer 0 for our timer interrupt, and timer 1 as
* monotonic counter for tracking missed jiffies.
*/
- iop3xx_cp6_enable();
asm volatile("mcr p6, 0, %0, c4, c1, 0" : : "r" (ticks_per_jiffy - 1));
asm volatile("mcr p6, 0, %0, c0, c1, 0" : : "r" (timer_ctl));
asm volatile("mcr p6, 0, %0, c5, c1, 0" : : "r" (0xffffffff));
asm volatile("mcr p6, 0, %0, c1, c1, 0" : : "r" (timer_ctl));
- iop3xx_cp6_disable();
setup_irq(IRQ_IOP3XX_TIMER0, &iop3xx_timer_irq);
}