path: root/arch/arm/mach-clps711x/Kconfig
diff options
authorLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 15:20:36 -0700
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 15:20:36 -0700
commit1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch)
tree0bba044c4ce775e45a88a51686b5d9f90697ea9d /arch/arm/mach-clps711x/Kconfig
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
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+menu "CLPS711X/EP721X Implementations"
+config ARCH_AUTCPU12
+ bool "AUTCPU12"
+ help
+ Say Y if you intend to run the kernel on the autronix autcpu12
+ board. This board is based on a Cirrus Logic CS89712.
+config ARCH_CDB89712
+ bool "CDB89712"
+ help
+ This is an evaluation board from Cirrus for the CS89712 processor.
+ The board includes 2 serial ports, Ethernet, IRDA, and expansion
+ headers. It comes with 16 MB SDRAM and 8 MB flash ROM.
+config ARCH_CEIVA
+ bool "CEIVA"
+ help
+ Say Y here if you intend to run this kernel on the Ceiva/Polaroid
+ PhotoMax Digital Picture Frame.
+config ARCH_CLEP7312
+ bool "CLEP7312"
+config ARCH_EDB7211
+ bool "EDB7211"
+ help
+ Say Y here if you intend to run this kernel on a Cirrus Logic EDB-7211
+ evaluation board.
+config ARCH_P720T
+ bool "P720T"
+ help
+ Say Y here if you intend to run this kernel on the ARM Prospector
+ 720T.
+ bool "FORTUNET"
+# XXX Maybe these should indicate register compatibility
+# instead of being mutually exclusive.
+config ARCH_EP7211
+ bool
+ depends on ARCH_EDB7211
+ default y
+config ARCH_EP7212
+ bool
+ depends on ARCH_P720T || ARCH_CEIVA
+ default y
+config EP72XX_ROM_BOOT
+ bool "EP72xx ROM boot"
+ depends on ARCH_EP7211 || ARCH_EP7212
+ ---help---
+ If you say Y here, your CLPS711x-based kernel will use the bootstrap
+ mode memory map instead of the normal memory map.
+ Processors derived from the Cirrus CLPS-711X core support two boot
+ modes. Normal mode boots from the external memory device at CS0.
+ Bootstrap mode rearranges parts of the memory map, placing an
+ internal 128 byte bootstrap ROM at CS0. This option performs the
+ address map changes required to support booting in this mode.
+ You almost surely want to say N here.