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authorAndrew Victor <andrew@sanpeople.com>2006-02-24 22:27:50 +0000
committerRussell King <rmk+kernel@arm.linux.org.uk>2006-02-24 22:27:50 +0000
commitabbea7187296a7fb316a55f2319438c2bf881f0a (patch)
tree28e8988de3cc8e81691bfd0170b1d03032dc7da7 /arch/arm/mach-at91rm9200
parentf52ee1410d563cd409b08822492273a5bc235821 (diff)
[ARM] 3348/1: Disable GPIO interrupts
Patch from Andrew Victor disable_irq() lazily disables the interrupt, so the IRQ is only disabled once the interrupt occurs again. The GPIO interrupt handler therefore must first check disable_depth to see if the IRQ needs to be disabled. Orignal patch by Bill Gatliff. Signed-off-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-at91rm9200')
-rw-r--r--arch/arm/mach-at91rm9200/gpio.c14
1 files changed, 12 insertions, 2 deletions
diff --git a/arch/arm/mach-at91rm9200/gpio.c b/arch/arm/mach-at91rm9200/gpio.c
index a9f718bf8ba..0e396feec46 100644
--- a/arch/arm/mach-at91rm9200/gpio.c
+++ b/arch/arm/mach-at91rm9200/gpio.c
@@ -274,8 +274,18 @@ static void gpio_irq_handler(unsigned irq, struct irqdesc *desc, struct pt_regs
gpio = &irq_desc[pin];
while (isr) {
- if (isr & 1)
- gpio->handle(pin, gpio, regs);
+ if (isr & 1) {
+ if (unlikely(gpio->disable_depth)) {
+ /*
+ * The core ARM interrupt handler lazily disables IRQs so
+ * another IRQ must be generated before it actually gets
+ * here to be disabled on the GPIO controller.
+ */
+ gpio_irq_mask(pin);
+ }
+ else
+ gpio->handle(pin, gpio, regs);
+ }
pin++;
gpio++;
isr >>= 1;