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authorAndrew Victor <andrew@sanpeople.com>2006-09-27 09:44:11 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2006-09-28 11:52:05 +0100
commit72729910c38ca5b4736032c15dc3f9d48fe4f68a (patch)
treee7461ec8e0ff07d1634d7d7a467cb8454135a5c8 /arch/arm/mach-at91rm9200/clock.c
parent26f908186f923291999833e9d563259834bdca06 (diff)
downloadlinux-2.6.34-ux500-72729910c38ca5b4736032c15dc3f9d48fe4f68a.tar.gz
[ARM] 3865/1: AT91RM9200 header updates
This is more preparation for adding support for the new Atmel AT91SAM9 processors. Changes include: - Replace AT91_BASE_* with AT91RM9200_BASE_* - Replace AT91_ID_* with AT91RM9200_ID_* - ROM, SRAM and UHP address definitions moved to at91rm9200.h. - The raw AT91_P[ABCD]_* definitions are now depreciated in favour of the GPIO API. Signed-off-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-at91rm9200/clock.c')
-rw-r--r--arch/arm/mach-at91rm9200/clock.c28
1 files changed, 14 insertions, 14 deletions
diff --git a/arch/arm/mach-at91rm9200/clock.c b/arch/arm/mach-at91rm9200/clock.c
index edc2cc837ae..5b7892277be 100644
--- a/arch/arm/mach-at91rm9200/clock.c
+++ b/arch/arm/mach-at91rm9200/clock.c
@@ -190,85 +190,85 @@ static void pmc_periph_mode(struct clk *clk, int is_on)
static struct clk udc_clk = {
.name = "udc_clk",
.parent = &mck,
- .pmc_mask = 1 << AT91_ID_UDP,
+ .pmc_mask = 1 << AT91RM9200_ID_UDP,
.mode = pmc_periph_mode,
};
static struct clk ohci_clk = {
.name = "ohci_clk",
.parent = &mck,
- .pmc_mask = 1 << AT91_ID_UHP,
+ .pmc_mask = 1 << AT91RM9200_ID_UHP,
.mode = pmc_periph_mode,
};
static struct clk ether_clk = {
.name = "ether_clk",
.parent = &mck,
- .pmc_mask = 1 << AT91_ID_EMAC,
+ .pmc_mask = 1 << AT91RM9200_ID_EMAC,
.mode = pmc_periph_mode,
};
static struct clk mmc_clk = {
.name = "mci_clk",
.parent = &mck,
- .pmc_mask = 1 << AT91_ID_MCI,
+ .pmc_mask = 1 << AT91RM9200_ID_MCI,
.mode = pmc_periph_mode,
};
static struct clk twi_clk = {
.name = "twi_clk",
.parent = &mck,
- .pmc_mask = 1 << AT91_ID_TWI,
+ .pmc_mask = 1 << AT91RM9200_ID_TWI,
.mode = pmc_periph_mode,
};
static struct clk usart0_clk = {
.name = "usart0_clk",
.parent = &mck,
- .pmc_mask = 1 << AT91_ID_US0,
+ .pmc_mask = 1 << AT91RM9200_ID_US0,
.mode = pmc_periph_mode,
};
static struct clk usart1_clk = {
.name = "usart1_clk",
.parent = &mck,
- .pmc_mask = 1 << AT91_ID_US1,
+ .pmc_mask = 1 << AT91RM9200_ID_US1,
.mode = pmc_periph_mode,
};
static struct clk usart2_clk = {
.name = "usart2_clk",
.parent = &mck,
- .pmc_mask = 1 << AT91_ID_US2,
+ .pmc_mask = 1 << AT91RM9200_ID_US2,
.mode = pmc_periph_mode,
};
static struct clk usart3_clk = {
.name = "usart3_clk",
.parent = &mck,
- .pmc_mask = 1 << AT91_ID_US3,
+ .pmc_mask = 1 << AT91RM9200_ID_US3,
.mode = pmc_periph_mode,
};
static struct clk spi_clk = {
.name = "spi0_clk",
.parent = &mck,
- .pmc_mask = 1 << AT91_ID_SPI,
+ .pmc_mask = 1 << AT91RM9200_ID_SPI,
.mode = pmc_periph_mode,
};
static struct clk pioA_clk = {
.name = "pioA_clk",
.parent = &mck,
- .pmc_mask = 1 << AT91_ID_PIOA,
+ .pmc_mask = 1 << AT91RM9200_ID_PIOA,
.mode = pmc_periph_mode,
};
static struct clk pioB_clk = {
.name = "pioB_clk",
.parent = &mck,
- .pmc_mask = 1 << AT91_ID_PIOB,
+ .pmc_mask = 1 << AT91RM9200_ID_PIOB,
.mode = pmc_periph_mode,
};
static struct clk pioC_clk = {
.name = "pioC_clk",
.parent = &mck,
- .pmc_mask = 1 << AT91_ID_PIOC,
+ .pmc_mask = 1 << AT91RM9200_ID_PIOC,
.mode = pmc_periph_mode,
};
static struct clk pioD_clk = {
.name = "pioD_clk",
.parent = &mck,
- .pmc_mask = 1 << AT91_ID_PIOD,
+ .pmc_mask = 1 << AT91RM9200_ID_PIOD,
.mode = pmc_periph_mode,
};