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-rw-r--r--arch/arm/include/asm/arch-omap4/omap4.h2
-rw-r--r--include/configs/omap4_common.h2
2 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/include/asm/arch-omap4/omap4.h b/arch/arm/include/asm/arch-omap4/omap4.h
index 162ab43f1..b6bcfa39c 100644
--- a/arch/arm/include/asm/arch-omap4/omap4.h
+++ b/arch/arm/include/asm/arch-omap4/omap4.h
@@ -168,7 +168,7 @@ struct control_lpddr2io_regs {
* Non-secure RAM starts at 0x40300000 for GP devices. But we keep SRAM_BASE
* at 0x40304000(EMU base) so that our code works for both EMU and GP
*/
-#define NON_SECURE_SRAM_START 0x40304000
+#define NON_SECURE_SRAM_START 0x40303000
#define NON_SECURE_SRAM_END 0x4030E000 /* Not inclusive */
/* base address for indirect vectors (internal boot mode) */
#define SRAM_ROM_VECT_BASE 0x4030D000
diff --git a/include/configs/omap4_common.h b/include/configs/omap4_common.h
index f88b4be3d..a6f4b8fef 100644
--- a/include/configs/omap4_common.h
+++ b/include/configs/omap4_common.h
@@ -267,7 +267,7 @@
/* Defines for SPL */
#define CONFIG_SPL
-#define CONFIG_SPL_TEXT_BASE 0x40304350
+#define CONFIG_SPL_TEXT_BASE 0x40303080
#define CONFIG_SPL_MAX_SIZE (38 * 1024)
#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK