diff options
author | Aneesh V <aneesh@ti.com> | 2011-09-20 19:33:01 +0530 |
---|---|---|
committer | John Rigby <john.rigby@linaro.org> | 2011-09-23 14:39:45 -0600 |
commit | 7da712c61fbdeb0fdd1b1c8c3f9005128c004378 (patch) | |
tree | e9bf05d644da9f4378af464df508c0e39de5d41e /arch/arm/cpu/armv7/omap4/clocks.c | |
parent | 892cd2a352bd7fbbc7f08b8d2bf5326dbcd34bd3 (diff) |
omap4460: tps initialization changes2011.09.2
Configure both SET0 and SET1 to the right voltage so that
kernel can use either one of them. Today only SET1 is
configured.
Signed-off-by: Aneesh V <aneesh@ti.com>
Diffstat (limited to 'arch/arm/cpu/armv7/omap4/clocks.c')
-rw-r--r-- | arch/arm/cpu/armv7/omap4/clocks.c | 21 |
1 files changed, 13 insertions, 8 deletions
diff --git a/arch/arm/cpu/armv7/omap4/clocks.c b/arch/arm/cpu/armv7/omap4/clocks.c index 3b5b9134d..85ede8520 100644 --- a/arch/arm/cpu/armv7/omap4/clocks.c +++ b/arch/arm/cpu/armv7/omap4/clocks.c @@ -490,14 +490,6 @@ static void do_scale_tps62361(u32 reg, u32 volt_mv) step = volt_mv - TPS62361_BASE_VOLT_MV; step /= 10; - /* - * Select SET1 in TPS62361: - * VSEL1 is grounded on board. So the following selects - * VSEL1 = 0 and VSEL0 = 1 - */ - gpio_direction_output(TPS62361_VSEL0_GPIO, 0); - gpio_set_value(TPS62361_VSEL0_GPIO, 1); - temp = TPS62361_I2C_SLAVE_ADDR | (reg << PRM_VC_VAL_BYPASS_REGADDR_SHIFT) | (step << PRM_VC_VAL_BYPASS_DATA_SHIFT) | @@ -574,8 +566,21 @@ static void scale_vcores(void) omap4_rev = omap_revision(); /* TPS - supplies vdd_mpu on 4460 */ if (omap4_rev >= OMAP4460_ES1_0) { + /* + * Setup SET1 and SET0 with right values so that kernel + * can use either of them based on its needs. + */ volt = 1430; + do_scale_tps62361(TPS62361_REG_ADDR_SET0, volt); do_scale_tps62361(TPS62361_REG_ADDR_SET1, volt); + + /* + * Select SET1 in TPS62361: + * VSEL1 is grounded on board. So the following selects + * VSEL1 = 0 and VSEL0 = 1 + */ + gpio_direction_output(TPS62361_VSEL0_GPIO, 0); + gpio_set_value(TPS62361_VSEL0_GPIO, 1); } /* |