From 4feab4de7bfc2cb2fed36ad76f93c3a69659bbaf Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Tue, 27 Feb 2007 23:51:42 -0600 Subject: mpc83xx: Fix config of Arbiter, System Priority, and Clock Mode The config value for: * CFG_ACR_PIPE_DEP * CFG_ACR_RPTCNT * CFG_SPCR_TSEC1EP * CFG_SPCR_TSEC2EP * CFG_SCCR_TSEC1CM * CFG_SCCR_TSEC2CM Were not being used when setting the appropriate register Added: * CFG_SCCR_USBMPHCM * CFG_SCCR_USBDRCM * CFG_SCCR_PCICM * CFG_SCCR_ENCCM To allow full config of the SCCR. Also removed random CFG_SCCR settings in MPC8349EMDS, TQM834x, and sbc8349 that were just bogus. Signed-off-by: Kumar Gala --- include/mpc83xx.h | 9 ++------- 1 file changed, 2 insertions(+), 7 deletions(-) (limited to 'include/mpc83xx.h') diff --git a/include/mpc83xx.h b/include/mpc83xx.h index 33f02ef07..c2a4ff587 100644 --- a/include/mpc83xx.h +++ b/include/mpc83xx.h @@ -509,6 +509,7 @@ #define SCCR_PCICM_SHIFT 16 /* SCCR bits - MPC8349 specific */ +#ifdef CONFIG_MPC834X #define SCCR_TSEC1CM 0xc0000000 #define SCCR_TSEC1CM_SHIFT 30 #define SCCR_TSEC1CM_0 0x00000000 @@ -522,6 +523,7 @@ #define SCCR_TSEC2CM_1 0x10000000 #define SCCR_TSEC2CM_2 0x20000000 #define SCCR_TSEC2CM_3 0x30000000 +#endif #define SCCR_USBMPHCM 0x00c00000 #define SCCR_USBMPHCM_SHIFT 22 @@ -533,13 +535,6 @@ #define SCCR_USBCM_2 0x00A00000 #define SCCR_USBCM_3 0x00F00000 -#define SCCR_CLK_MASK ( SCCR_TSEC1CM_3 \ - | SCCR_TSEC2CM_3 \ - | SCCR_ENCCM_3 \ - | SCCR_USBCM_3 ) - -#define SCCR_DEFAULT 0xFFFFFFFF - /* CSn_BDNS - Chip Select memory Bounds Register */ #define CSBNDS_SA 0x00FF0000 -- cgit v1.2.3