1 files changed, 43 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/mx5/cache.S b/arch/arm/cpu/armv7/mx5/cache.S
new file mode 100644
index 000000000..c81c8be27
--- /dev/null
+++ b/arch/arm/cpu/armv7/mx5/cache.S
@@ -0,0 +1,43 @@
+/*
+ * Copyright 2011 Linaro Ltd.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+.align 5
+.global invalidate_dcache
+.global l2_cache_enable
+.global l2_cache_disable
+
+/*
+ * Sine we did not enable D-cache in uboot,this is the
+ * Dummy function for L2 ON to make build pass. please
+ * Check the arch/arm/cpu/armv7/cpu.c file
+ */
+invalidate_dcache:
+	mov	pc, lr
+
+l2_cache_enable:
+	mrc	p15, 0, r0, c1, c0, 1;
+	orr	r0, r0, #0x2
+	mcr	p15, 0, r0, c1, c0, 1;
+	mov	pc, lr
+
+l2_cache_disable:
+	mrc	p15, 0, r0, c1, c0, 1;
+	bic	r0, r0, #0x2
+	mcr	p15, 0, r0, c1, c0, 1;
+	mov	pc, lr