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/*
* Copyright 2004-2011 Freescale Semiconductor, Inc. All Rights Reserved.
*/
/*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __ASM_ARCH_MXC_MEMORY_H__
#define __ASM_ARCH_MXC_MEMORY_H__
#include <asm/sizes.h>
#include <asm/page.h>
#define MX1_PHYS_OFFSET UL(0x08000000)
#define MX21_PHYS_OFFSET UL(0xc0000000)
#define MX25_PHYS_OFFSET UL(0x80000000)
#define MX27_PHYS_OFFSET UL(0xa0000000)
#define MX3x_PHYS_OFFSET UL(0x80000000)
#define MX50_PHYS_OFFSET UL(0x70000000)
#define MX51_PHYS_OFFSET UL(0x90000000)
#define MX53_PHYS_OFFSET UL(0x70000000)
#define MX6_PHYS_OFFSET UL(0x10000000)
#define MXC91231_PHYS_OFFSET UL(0x90000000)
#if !defined(CONFIG_RUNTIME_PHYS_OFFSET)
# if defined CONFIG_ARCH_MX1
# define PLAT_PHYS_OFFSET MX1_PHYS_OFFSET
# elif defined CONFIG_MACH_MX21
# define PLAT_PHYS_OFFSET MX21_PHYS_OFFSET
# elif defined CONFIG_ARCH_MX25
# define PLAT_PHYS_OFFSET MX25_PHYS_OFFSET
# elif defined CONFIG_MACH_MX27
# define PLAT_PHYS_OFFSET MX27_PHYS_OFFSET
# elif defined CONFIG_ARCH_MX3
# define PLAT_PHYS_OFFSET MX3x_PHYS_OFFSET
# elif defined CONFIG_ARCH_MXC91231
# define PLAT_PHYS_OFFSET MXC91231_PHYS_OFFSET
# elif defined CONFIG_ARCH_MX50
# define PLAT_PHYS_OFFSET MX50_PHYS_OFFSET
# elif defined CONFIG_ARCH_MX51
# define PLAT_PHYS_OFFSET MX51_PHYS_OFFSET
# elif defined CONFIG_ARCH_MX53
# define PLAT_PHYS_OFFSET MX53_PHYS_OFFSET
# elif defined CONFIG_ARCH_MX50
# define PLAT_PHYS_OFFSET MX50_PHYS_OFFSET
# elif defined CONFIG_ARCH_MX6
# define PLAT_PHYS_OFFSET MX6_PHYS_OFFSET
# endif
#endif
#if defined(CONFIG_MX3_VIDEO)
/*
* Increase size of DMA-consistent memory region.
* This is required for mx3 camera driver to capture at least two QXGA frames.
*/
#define CONSISTENT_DMA_SIZE SZ_8M
#elif defined(CONFIG_MX1_VIDEO) || defined(CONFIG_VIDEO_MX2_HOSTSUPPORT)
/*
* Increase size of DMA-consistent memory region.
* This is required for i.MX camera driver to capture at least four VGA frames.
*/
#define CONSISTENT_DMA_SIZE SZ_4M
#else
#if defined(CONFIG_ARCH_MX5) || defined(CONFIG_ARCH_MX6)
#define CONSISTENT_DMA_SIZE (184 * SZ_1M)
#else
#define CONSISTENT_DMA_SIZE (32 * SZ_1M)
#endif
#endif /* CONFIG_MX1_VIDEO || CONFIG_VIDEO_MX2_HOSTSUPPORT */
#ifndef __ASSEMBLY__
#ifdef CONFIG_DMA_ZONE_SIZE
#define MXC_DMA_ZONE_SIZE ((CONFIG_DMA_ZONE_SIZE * SZ_1M) >> PAGE_SHIFT)
#else
#define MXC_DMA_ZONE_SIZE ((12 * SZ_1M) >> PAGE_SHIFT)
#endif
static inline void __arch_adjust_zones(unsigned long *zone_size,
unsigned long *zhole_size)
{
#ifdef CONFIG_ZONE_DMA
/* Create separate zone to reserve memory for DMA */
if ((zone_size[0] - zhole_size[0]) > MXC_DMA_ZONE_SIZE) {
zone_size[1] = zone_size[0] - MXC_DMA_ZONE_SIZE;
zone_size[0] = MXC_DMA_ZONE_SIZE;
zhole_size[1] = zhole_size[0];
zhole_size[0] = 0;
}
#endif
}
#define arch_adjust_zones(size, holes) \
__arch_adjust_zones(size, holes)
#endif
#endif /* __ASM_ARCH_MXC_MEMORY_H__ */
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