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path: root/arch/arm/boot/dts/imx6q-sabrelite.dts
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/*
 * Copyright 2011 Freescale Semiconductor, Inc.
 * Copyright 2011 Linaro Ltd.
 *
 * The code contained herein is licensed under the GNU General Public
 * License. You may obtain a copy of the GNU General Public License
 * Version 2 or later at the following locations:
 *
 * http://www.opensource.org/licenses/gpl-license.html
 * http://www.gnu.org/copyleft/gpl.html
 */

/dts-v1/;
/include/ "imx6q.dtsi"

/ {
	model = "Freescale i.MX6 Quad SABRE Lite Board";
	compatible = "fsl,imx6q-sabrelite", "fsl,imx6q";

	chosen {
		bootargs = "console=ttymxc1,115200 root=/dev/mmcblk3p3 rootwait";
	};

	memory {
		reg = <0x10000000 0x70000000>;
	};

	soc {
		aips-bus@02000000 { /* AIPS1 */
			ldb@020e0000 {
				disp-pwr-gpios = <&gpio1 0 0>; /* gpio2 0 */
				mode = "sin0";
				ext_ref = "true";
				lvds0 = <1 0>;
			};
		};

		aips-bus@02100000 { /* AIPS2 */
			enet@02188000 {
				phy-mode = "rgmii";
				local-mac-address = [01 04 9F 01 1B 61];
				phy-reset-gpios = <&gpio2 23 0>; /* gpio3 23 */
				status = "okay";
			};

			usdhc@02198000 { /* uSDHC3 */
				status = "okay";
			};

			usdhc@0219c000 { /* uSDHC4 */
				fsl,card-wired;
				status = "okay";
			};

			uart1: uart@021e8000 { /* UART2 */
				status = "okay";
			};

			i2c@021a4000 { /* I2C2 */
				status = "okay";
				clock-frequency = <400000>;

				ddc: ddc@50 {
					compatible = "fsl,imx6q-hdmi-ddc";
					reg = <0x50>;
				};
			};
		};

		hdmi@0x00120000 { /* HDMI */
			ipu = <0>;
			di = <0>;
		};
	};

	leds {
		compatible = "gpio-leds";

		debug-led {
			label = "Heartbeat";
			gpios = <&gpio2 25 0>; /* GPIO3_25 */
			linux,default-trigger = "heartbeat";
		};
	};

	backlight {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "simple-bus";

		pwm_bl {
			compatible = "pwm-bl";
			pwm-parent = <&pwm4>;
			max_brightness = <255>;
			dft_brightness = <128>;
			pwm_period_ns = <50000>;
		};
	};

	displays {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "simple-bus";
		ranges;

		disp1: fb@0 {
			compatible = "fsl,mxcfb-ipuv3";
			disp_dev = "hdmi";
			interface_pix_fmt = "RGB24";
			mode_str = "1280x720M@60";
			internal_clk = "false";
			reg = <0x00000000 0x0>;	/* reserve fb mem */
		};

		disp2: fb@1 {
			compatible = "fsl,mxcfb-ipuv3";
			disp_dev = "ldb";
			interface_pix_fmt = "RGB666";
			mode_str = "LDB-XGA";
			internal_clk = "false";
			reg = <0x00000001 0x0>;	/* reserve fb mem */
		};
	};
};