From ab61af30253ca1ef10816caa706ccc487c646926 Mon Sep 17 00:00:00 2001 From: Anson Huang Date: Thu, 3 Nov 2011 15:51:35 +0800 Subject: ENGR00161321 [MX6 ARM2]Disable Warm reset Current warm reset is not working with MMDC_CH1 bypass bit set, now we disable warm reset to workaround it for the coming release. Then, wdog reset will be cold reset. Signed-off-by: Anson Huang --- arch/arm/mach-mx6/cpu.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/mach-mx6/cpu.c b/arch/arm/mach-mx6/cpu.c index 66dde3c6a66..0e85d925dfd 100644 --- a/arch/arm/mach-mx6/cpu.c +++ b/arch/arm/mach-mx6/cpu.c @@ -91,6 +91,13 @@ static int __init post_cpu_init(void) reg |= 0x20; __raw_writel(reg, base); } + + /* Disable SRC warm reset to work aound system reboot issue */ + base = IO_ADDRESS(SRC_BASE_ADDR); + reg = __raw_readl(base); + reg &= ~0x1; + __raw_writel(reg, base); + /* Allocate IRAM for WAIT code. */ /* Move wait routine into iRAM */ cpaddr = (unsigned long)iram_alloc(SZ_4K, &iram_paddr); -- cgit v1.2.3