From 6155aface4a5048b6398fe2b5bc33687db9fb26b Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Fri, 30 Dec 2011 17:26:40 +0800 Subject: ARM: imx6: fix v7_invalidate_l1 by adding I-Cache invalidation The recent suspend/resume and reset testing on imx6q discovers that not only D-Cache but also I-Cache has random data and validity when the core comes out of a power recycle. This patch adds I-Cache invalidation into v7_invalidate_l1 to make sure both D-Cache and I-Cache invalidated on power-up. Signed-off-by: Shawn Guo Signed-off-by: Eric Miao --- arch/arm/mach-imx/head-v7.S | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/mach-imx/head-v7.S b/arch/arm/mach-imx/head-v7.S index cec23a857c7..ea12b0c4a05 100644 --- a/arch/arm/mach-imx/head-v7.S +++ b/arch/arm/mach-imx/head-v7.S @@ -33,6 +33,7 @@ */ ENTRY(v7_invalidate_l1) mov r0, #0 + mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache mcr p15, 2, r0, c0, c0, 0 mrc p15, 1, r0, c0, c0, 0 -- cgit v1.2.1