freescale/linux-linaro.git - Freescale's kernel release and i.MX53 v3.1 Linaro kernel

Age	Commit message (Expand)	Author
2006-07-13	[MIPS] Use the proper technical term for naming some of the cache macros.	Ralf Baechle
2006-06-01	[MIPS] Treat R14000 like R10000.	Kumba
2006-06-01	[MIPS] Fix detection and handling of the 74K processor.	Chris Dearman
2006-02-14	[MIPS] Fix CPU type bitmasks for MIPS III, IV and V.	Maciej W. Rozycki
2006-01-10	MIPS: Reorganize ISA constants strictly as bitmasks.	Ralf Baechle
2006-01-10	MIPS: Introduce machinery for testing for MIPSxxR1/2.	Ralf Baechle
2006-01-10	MIPS: Rename MIPS_CPU_ISA_M{32,64} -> MIPS_CPU_ISA_M{32,64}R1.	Ralf Baechle
2005-10-29	Add support for SB1A CPU.	Andrew Isaacson
2005-10-29	Cleanup the mess in cpu_cache_init.	Ralf Baechle
2005-10-29	Move MIPS Technologies processor IDs to where they belong.	Maciej W. Rozycki
2005-10-29	Philips PNX8550 support: MIPS32-like core with 2 Trimedias on it.	Pete Popov
2005-10-29	Detect the MIPS R2 vectored interrupt, external interrupt controller	Ralf Baechle
2005-10-29	Detect the 34K.	Ralf Baechle
2005-10-29	Support the MIPS32 / MIPS64 DSP ASE.	Ralf Baechle
2005-10-29	Cleanup decoding of MIPSxx config registers.	Ralf Baechle
2005-10-29	Base Au1200 2.6 support.	Pete Popov
2005-10-29	Add a few more PrId vendor IDs.	Ralf Baechle
2005-04-16	Linux-2.6.12-rc2v2.6.12-rc2	Linus Torvalds