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-rw-r--r--arch/arm/boot/dts/imx6q-sabrelite.dts9
-rw-r--r--arch/arm/boot/dts/imx6q.dtsi5
-rw-r--r--arch/arm/mach-imx/clock-imx6q.c2
3 files changed, 16 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6q-sabrelite.dts b/arch/arm/boot/dts/imx6q-sabrelite.dts
index 965dfbc802c..d2e0cd9166c 100644
--- a/arch/arm/boot/dts/imx6q-sabrelite.dts
+++ b/arch/arm/boot/dts/imx6q-sabrelite.dts
@@ -22,6 +22,15 @@
};
soc {
+ aips-bus@02000000 { /* AIPS1 */
+ ldb@020e0000 {
+ disp-pwr-gpios = <&gpio1 0 0>; /* gpio2 0 */
+ mode = "sin0";
+ ext_ref = "true";
+ lvds0 = <1 0>;
+ };
+ };
+
aips-bus@02100000 { /* AIPS2 */
enet@02188000 {
phy-mode = "rgmii";
diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi
index 3b7436008ea..c24f7723f15 100644
--- a/arch/arm/boot/dts/imx6q.dtsi
+++ b/arch/arm/boot/dts/imx6q.dtsi
@@ -393,6 +393,11 @@
reg = <0x020e0000 0x4000>;
};
+ ldb@020e0000 {
+ compatible = "fsl,imx6q-ldb";
+ reg = <0x020e0000 0x4>;
+ };
+
dcic@020e4000 { /* DCIC1 */
reg = <0x020e4000 0x4000>;
interrupts = <0 124 0x04>;
diff --git a/arch/arm/mach-imx/clock-imx6q.c b/arch/arm/mach-imx/clock-imx6q.c
index eca30e4b8c1..c436a711d7e 100644
--- a/arch/arm/mach-imx/clock-imx6q.c
+++ b/arch/arm/mach-imx/clock-imx6q.c
@@ -1936,6 +1936,8 @@ static struct clk_lookup lookups[] = {
_REGISTER_CLOCK(NULL, "ipu2_di0_clk", ipu2_di0_clk),
_REGISTER_CLOCK(NULL, "ipu2_di1_clk", ipu2_di1_clk),
_REGISTER_CLOCK(NULL, "hdmi_iahb_clk", hdmi_iahb_clk),
+ _REGISTER_CLOCK(NULL, "ldb_di0_clk", ldb_di0_clk),
+ _REGISTER_CLOCK(NULL, "ldb_di1_clk", ldb_di1_clk),
};
int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode)