diff options
Diffstat (limited to 'arch/arm/mach-orion5x')
30 files changed, 142 insertions, 81 deletions
diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c index 8dc2c76d226..986c3bf4e6b 100644 --- a/arch/arm/mach-orion5x/common.c +++ b/arch/arm/mach-orion5x/common.c @@ -26,6 +26,7 @@ #include <asm/mach/arch.h> #include <asm/mach/map.h> #include <asm/mach/time.h> +#include <mach/bridge-regs.h> #include <mach/hardware.h> #include <mach/orion5x.h> #include <plat/ehci-orion.h> @@ -599,6 +600,11 @@ void __init orion5x_wdt_init(void) /***************************************************************************** * Time handling ****************************************************************************/ +void __init orion5x_init_early(void) +{ + orion_time_set_base(TIMER_VIRT_BASE); +} + int orion5x_tclk; int __init orion5x_find_tclk(void) @@ -616,7 +622,9 @@ int __init orion5x_find_tclk(void) static void orion5x_timer_init(void) { orion5x_tclk = orion5x_find_tclk(); - orion_time_init(IRQ_ORION5X_BRIDGE, orion5x_tclk); + + orion_time_init(ORION5X_BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR, + IRQ_ORION5X_BRIDGE, orion5x_tclk); } struct sys_timer orion5x_timer = { diff --git a/arch/arm/mach-orion5x/common.h b/arch/arm/mach-orion5x/common.h index 8f004503c96..f2b2b35e864 100644 --- a/arch/arm/mach-orion5x/common.h +++ b/arch/arm/mach-orion5x/common.h @@ -9,6 +9,7 @@ struct mv_sata_platform_data; * Basic Orion init functions used early by machine-setup. */ void orion5x_map_io(void); +void orion5x_init_early(void); void orion5x_init_irq(void); void orion5x_init(void); extern int orion5x_tclk; diff --git a/arch/arm/mach-orion5x/d2net-setup.c b/arch/arm/mach-orion5x/d2net-setup.c index b1c451f5ee2..42580757930 100644 --- a/arch/arm/mach-orion5x/d2net-setup.c +++ b/arch/arm/mach-orion5x/d2net-setup.c @@ -339,6 +339,7 @@ MACHINE_START(D2NET, "LaCie d2 Network") .boot_params = 0x00000100, .init_machine = d2net_init, .map_io = orion5x_map_io, + .init_early = orion5x_init_early, .init_irq = orion5x_init_irq, .timer = &orion5x_timer, .fixup = tag_fixup_mem32, @@ -350,6 +351,7 @@ MACHINE_START(BIGDISK, "LaCie Big Disk Network") .boot_params = 0x00000100, .init_machine = d2net_init, .map_io = orion5x_map_io, + .init_early = orion5x_init_early, .init_irq = orion5x_init_irq, .timer = &orion5x_timer, .fixup = tag_fixup_mem32, diff --git a/arch/arm/mach-orion5x/db88f5281-setup.c b/arch/arm/mach-orion5x/db88f5281-setup.c index df1083f5b6e..b7d4591214e 100644 --- a/arch/arm/mach-orion5x/db88f5281-setup.c +++ b/arch/arm/mach-orion5x/db88f5281-setup.c @@ -213,7 +213,7 @@ void __init db88f5281_pci_preinit(void) pin = DB88F5281_PCI_SLOT0_IRQ_PIN; if (gpio_request(pin, "PCI Int1") == 0) { if (gpio_direction_input(pin) == 0) { - set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW); + irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW); } else { printk(KERN_ERR "db88f5281_pci_preinit faield to " "set_irq_type pin %d\n", pin); @@ -226,7 +226,7 @@ void __init db88f5281_pci_preinit(void) pin = DB88F5281_PCI_SLOT1_SLOT2_IRQ_PIN; if (gpio_request(pin, "PCI Int2") == 0) { if (gpio_direction_input(pin) == 0) { - set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW); + irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW); } else { printk(KERN_ERR "db88f5281_pci_preinit faield " "to set_irq_type pin %d\n", pin); @@ -361,6 +361,7 @@ MACHINE_START(DB88F5281, "Marvell Orion-2 Development Board") .boot_params = 0x00000100, .init_machine = db88f5281_init, .map_io = orion5x_map_io, + .init_early = orion5x_init_early, .init_irq = orion5x_init_irq, .timer = &orion5x_timer, MACHINE_END diff --git a/arch/arm/mach-orion5x/dns323-setup.c b/arch/arm/mach-orion5x/dns323-setup.c index 3a7bc0e3698..90ab022eabe 100644 --- a/arch/arm/mach-orion5x/dns323-setup.c +++ b/arch/arm/mach-orion5x/dns323-setup.c @@ -733,6 +733,7 @@ MACHINE_START(DNS323, "D-Link DNS-323") .boot_params = 0x00000100, .init_machine = dns323_init, .map_io = orion5x_map_io, + .init_early = orion5x_init_early, .init_irq = orion5x_init_irq, .timer = &orion5x_timer, .fixup = tag_fixup_mem32, diff --git a/arch/arm/mach-orion5x/edmini_v2-setup.c b/arch/arm/mach-orion5x/edmini_v2-setup.c index ba98459f44b..d037a90c216 100644 --- a/arch/arm/mach-orion5x/edmini_v2-setup.c +++ b/arch/arm/mach-orion5x/edmini_v2-setup.c @@ -254,6 +254,7 @@ MACHINE_START(EDMINI_V2, "LaCie Ethernet Disk mini V2") .boot_params = 0x00000100, .init_machine = edmini_v2_init, .map_io = orion5x_map_io, + .init_early = orion5x_init_early, .init_irq = orion5x_init_irq, .timer = &orion5x_timer, .fixup = tag_fixup_mem32, diff --git a/arch/arm/mach-orion5x/include/mach/bridge-regs.h b/arch/arm/mach-orion5x/include/mach/bridge-regs.h index 5c9744cd8ef..96484bcd34c 100644 --- a/arch/arm/mach-orion5x/include/mach/bridge-regs.h +++ b/arch/arm/mach-orion5x/include/mach/bridge-regs.h @@ -22,14 +22,12 @@ #define CPU_SOFT_RESET (ORION5X_BRIDGE_VIRT_BASE | 0x10c) +#define BRIDGE_CAUSE (ORION5X_BRIDGE_VIRT_BASE | 0x110) + #define POWER_MNG_CTRL_REG (ORION5X_BRIDGE_VIRT_BASE | 0x11C) -#define BRIDGE_CAUSE (ORION5X_BRIDGE_VIRT_BASE | 0x110) #define WDT_INT_REQ 0x0008 -#define BRIDGE_MASK (ORION5X_BRIDGE_VIRT_BASE | 0x114) -#define BRIDGE_INT_TIMER0 0x0002 -#define BRIDGE_INT_TIMER1 0x0004 #define BRIDGE_INT_TIMER1_CLR (~0x0004) #define MAIN_IRQ_CAUSE (ORION5X_BRIDGE_VIRT_BASE | 0x200) diff --git a/arch/arm/mach-orion5x/include/mach/gpio.h b/arch/arm/mach-orion5x/include/mach/gpio.h index d8182e87ac1..a1d0b78decb 100644 --- a/arch/arm/mach-orion5x/include/mach/gpio.h +++ b/arch/arm/mach-orion5x/include/mach/gpio.h @@ -6,32 +6,4 @@ * warranty of any kind, whether express or implied. */ -#ifndef __ASM_ARCH_GPIO_H -#define __ASM_ARCH_GPIO_H - -#include <mach/irqs.h> #include <plat/gpio.h> -#include <asm-generic/gpio.h> /* cansleep wrappers */ - -#define GPIO_MAX 32 -#define GPIO_OUT(pin) ORION5X_DEV_BUS_REG(0x100) -#define GPIO_IO_CONF(pin) ORION5X_DEV_BUS_REG(0x104) -#define GPIO_BLINK_EN(pin) ORION5X_DEV_BUS_REG(0x108) -#define GPIO_IN_POL(pin) ORION5X_DEV_BUS_REG(0x10c) -#define GPIO_DATA_IN(pin) ORION5X_DEV_BUS_REG(0x110) -#define GPIO_EDGE_CAUSE(pin) ORION5X_DEV_BUS_REG(0x114) -#define GPIO_EDGE_MASK(pin) ORION5X_DEV_BUS_REG(0x118) -#define GPIO_LEVEL_MASK(pin) ORION5X_DEV_BUS_REG(0x11c) - -static inline int gpio_to_irq(int pin) -{ - return pin + IRQ_ORION5X_GPIO_START; -} - -static inline int irq_to_gpio(int irq) -{ - return irq - IRQ_ORION5X_GPIO_START; -} - - -#endif diff --git a/arch/arm/mach-orion5x/include/mach/memory.h b/arch/arm/mach-orion5x/include/mach/memory.h index 52a2955d0f8..6769917882f 100644 --- a/arch/arm/mach-orion5x/include/mach/memory.h +++ b/arch/arm/mach-orion5x/include/mach/memory.h @@ -7,6 +7,6 @@ #ifndef __ASM_ARCH_MEMORY_H #define __ASM_ARCH_MEMORY_H -#define PHYS_OFFSET UL(0x00000000) +#define PLAT_PHYS_OFFSET UL(0x00000000) #endif diff --git a/arch/arm/mach-orion5x/include/mach/orion5x.h b/arch/arm/mach-orion5x/include/mach/orion5x.h index 2d876657053..0a28bbc7689 100644 --- a/arch/arm/mach-orion5x/include/mach/orion5x.h +++ b/arch/arm/mach-orion5x/include/mach/orion5x.h @@ -73,6 +73,7 @@ #define ORION5X_DEV_BUS_PHYS_BASE (ORION5X_REGS_PHYS_BASE | 0x10000) #define ORION5X_DEV_BUS_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x10000) #define ORION5X_DEV_BUS_REG(x) (ORION5X_DEV_BUS_VIRT_BASE | (x)) +#define GPIO_VIRT_BASE ORION5X_DEV_BUS_REG(0x0100) #define SPI_PHYS_BASE (ORION5X_DEV_BUS_PHYS_BASE | 0x0600) #define I2C_PHYS_BASE (ORION5X_DEV_BUS_PHYS_BASE | 0x1000) #define UART0_PHYS_BASE (ORION5X_DEV_BUS_PHYS_BASE | 0x2000) diff --git a/arch/arm/mach-orion5x/irq.c b/arch/arm/mach-orion5x/irq.c index d7512b925a8..43cf8bc9767 100644 --- a/arch/arm/mach-orion5x/irq.c +++ b/arch/arm/mach-orion5x/irq.c @@ -28,29 +28,14 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc) void __init orion5x_init_irq(void) { - int i; - orion_irq_init(0, (void __iomem *)MAIN_IRQ_MASK); /* - * Mask and clear GPIO IRQ interrupts - */ - writel(0x0, GPIO_LEVEL_MASK(0)); - writel(0x0, GPIO_EDGE_MASK(0)); - writel(0x0, GPIO_EDGE_CAUSE(0)); - - /* - * Register chained level handlers for GPIO IRQs by default. - * User can use set_type() if he wants to use edge types handlers. + * Initialize gpiolib for GPIOs 0-31. */ - for (i = IRQ_ORION5X_GPIO_START; i < NR_IRQS; i++) { - set_irq_chip(i, &orion_gpio_irq_chip); - set_irq_handler(i, handle_level_irq); - irq_desc[i].status |= IRQ_LEVEL; - set_irq_flags(i, IRQF_VALID); - } - set_irq_chained_handler(IRQ_ORION5X_GPIO_0_7, gpio_irq_handler); - set_irq_chained_handler(IRQ_ORION5X_GPIO_8_15, gpio_irq_handler); - set_irq_chained_handler(IRQ_ORION5X_GPIO_16_23, gpio_irq_handler); - set_irq_chained_handler(IRQ_ORION5X_GPIO_24_31, gpio_irq_handler); + orion_gpio_init(0, 32, GPIO_VIRT_BASE, 0, IRQ_ORION5X_GPIO_START); + irq_set_chained_handler(IRQ_ORION5X_GPIO_0_7, gpio_irq_handler); + irq_set_chained_handler(IRQ_ORION5X_GPIO_8_15, gpio_irq_handler); + irq_set_chained_handler(IRQ_ORION5X_GPIO_16_23, gpio_irq_handler); + irq_set_chained_handler(IRQ_ORION5X_GPIO_24_31, gpio_irq_handler); } diff --git a/arch/arm/mach-orion5x/kurobox_pro-setup.c b/arch/arm/mach-orion5x/kurobox_pro-setup.c index 4be9aa08de6..47497c76162 100644 --- a/arch/arm/mach-orion5x/kurobox_pro-setup.c +++ b/arch/arm/mach-orion5x/kurobox_pro-setup.c @@ -382,6 +382,7 @@ MACHINE_START(KUROBOX_PRO, "Buffalo/Revogear Kurobox Pro") .boot_params = 0x00000100, .init_machine = kurobox_pro_init, .map_io = orion5x_map_io, + .init_early = orion5x_init_early, .init_irq = orion5x_init_irq, .timer = &orion5x_timer, .fixup = tag_fixup_mem32, @@ -394,6 +395,7 @@ MACHINE_START(LINKSTATION_PRO, "Buffalo Linkstation Pro/Live") .boot_params = 0x00000100, .init_machine = kurobox_pro_init, .map_io = orion5x_map_io, + .init_early = orion5x_init_early, .init_irq = orion5x_init_irq, .timer = &orion5x_timer, .fixup = tag_fixup_mem32, diff --git a/arch/arm/mach-orion5x/ls-chl-setup.c b/arch/arm/mach-orion5x/ls-chl-setup.c index 20a9b66cbaf..6ae12aa6d75 100644 --- a/arch/arm/mach-orion5x/ls-chl-setup.c +++ b/arch/arm/mach-orion5x/ls-chl-setup.c @@ -321,6 +321,7 @@ MACHINE_START(LINKSTATION_LSCHL, "Buffalo Linkstation LiveV3 (LS-CHL)") .boot_params = 0x00000100, .init_machine = lschl_init, .map_io = orion5x_map_io, + .init_early = orion5x_init_early, .init_irq = orion5x_init_irq, .timer = &orion5x_timer, .fixup = tag_fixup_mem32, diff --git a/arch/arm/mach-orion5x/ls_hgl-setup.c b/arch/arm/mach-orion5x/ls_hgl-setup.c index 437364b7168..7adafd79cf9 100644 --- a/arch/arm/mach-orion5x/ls_hgl-setup.c +++ b/arch/arm/mach-orion5x/ls_hgl-setup.c @@ -268,6 +268,7 @@ MACHINE_START(LINKSTATION_LS_HGL, "Buffalo Linkstation LS-HGL") .boot_params = 0x00000100, .init_machine = ls_hgl_init, .map_io = orion5x_map_io, + .init_early = orion5x_init_early, .init_irq = orion5x_init_irq, .timer = &orion5x_timer, .fixup = tag_fixup_mem32, diff --git a/arch/arm/mach-orion5x/lsmini-setup.c b/arch/arm/mach-orion5x/lsmini-setup.c index ab9b0cf0a90..869958f5c39 100644 --- a/arch/arm/mach-orion5x/lsmini-setup.c +++ b/arch/arm/mach-orion5x/lsmini-setup.c @@ -270,6 +270,7 @@ MACHINE_START(LINKSTATION_MINI, "Buffalo Linkstation Mini") .boot_params = 0x00000100, .init_machine = lsmini_init, .map_io = orion5x_map_io, + .init_early = orion5x_init_early, .init_irq = orion5x_init_irq, .timer = &orion5x_timer, .fixup = tag_fixup_mem32, diff --git a/arch/arm/mach-orion5x/mpp.c b/arch/arm/mach-orion5x/mpp.c index db485d3b814..2288207726e 100644 --- a/arch/arm/mach-orion5x/mpp.c +++ b/arch/arm/mach-orion5x/mpp.c @@ -124,9 +124,6 @@ void __init orion5x_mpp_conf(struct orion5x_mpp_mode *mode) u32 mpp_8_15_ctrl = readl(MPP_8_15_CTRL); u32 mpp_16_19_ctrl = readl(MPP_16_19_CTRL); - /* Initialize gpiolib. */ - orion_gpio_init(); - for ( ; mode->mpp >= 0; mode++) { u32 *reg; int num_type; diff --git a/arch/arm/mach-orion5x/mss2-setup.c b/arch/arm/mach-orion5x/mss2-setup.c index 2f0e16cd7e8..b43b208153c 100644 --- a/arch/arm/mach-orion5x/mss2-setup.c +++ b/arch/arm/mach-orion5x/mss2-setup.c @@ -264,6 +264,7 @@ MACHINE_START(MSS2, "Maxtor Shared Storage II") .boot_params = 0x00000100, .init_machine = mss2_init, .map_io = orion5x_map_io, + .init_early = orion5x_init_early, .init_irq = orion5x_init_irq, .timer = &orion5x_timer, .fixup = tag_fixup_mem32 diff --git a/arch/arm/mach-orion5x/mv2120-setup.c b/arch/arm/mach-orion5x/mv2120-setup.c index b3d90f25de9..c55d071707f 100644 --- a/arch/arm/mach-orion5x/mv2120-setup.c +++ b/arch/arm/mach-orion5x/mv2120-setup.c @@ -232,6 +232,7 @@ MACHINE_START(MV2120, "HP Media Vault mv2120") .boot_params = 0x00000100, .init_machine = mv2120_init, .map_io = orion5x_map_io, + .init_early = orion5x_init_early, .init_irq = orion5x_init_irq, .timer = &orion5x_timer, .fixup = tag_fixup_mem32 diff --git a/arch/arm/mach-orion5x/net2big-setup.c b/arch/arm/mach-orion5x/net2big-setup.c index d6665b31665..429ecafe9fd 100644 --- a/arch/arm/mach-orion5x/net2big-setup.c +++ b/arch/arm/mach-orion5x/net2big-setup.c @@ -422,6 +422,7 @@ MACHINE_START(NET2BIG, "LaCie 2Big Network") .boot_params = 0x00000100, .init_machine = net2big_init, .map_io = orion5x_map_io, + .init_early = orion5x_init_early, .init_irq = orion5x_init_irq, .timer = &orion5x_timer, .fixup = tag_fixup_mem32, diff --git a/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c b/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c index f4c26fd731f..34310ab56e2 100644 --- a/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c +++ b/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c @@ -172,6 +172,7 @@ MACHINE_START(RD88F5181L_FXO, "Marvell Orion-VoIP FXO Reference Design") .boot_params = 0x00000100, .init_machine = rd88f5181l_fxo_init, .map_io = orion5x_map_io, + .init_early = orion5x_init_early, .init_irq = orion5x_init_irq, .timer = &orion5x_timer, .fixup = tag_fixup_mem32, diff --git a/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c b/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c index b5942909bab..c1f79fa014e 100644 --- a/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c +++ b/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c @@ -184,6 +184,7 @@ MACHINE_START(RD88F5181L_GE, "Marvell Orion-VoIP GE Reference Design") .boot_params = 0x00000100, .init_machine = rd88f5181l_ge_init, .map_io = orion5x_map_io, + .init_early = orion5x_init_early, .init_irq = orion5x_init_irq, .timer = &orion5x_timer, .fixup = tag_fixup_mem32, diff --git a/arch/arm/mach-orion5x/rd88f5182-setup.c b/arch/arm/mach-orion5x/rd88f5182-setup.c index 165ed87029b..4fc46772a08 100644 --- a/arch/arm/mach-orion5x/rd88f5182-setup.c +++ b/arch/arm/mach-orion5x/rd88f5182-setup.c @@ -148,7 +148,7 @@ void __init rd88f5182_pci_preinit(void) pin = RD88F5182_PCI_SLOT0_IRQ_A_PIN; if (gpio_request(pin, "PCI IntA") == 0) { if (gpio_direction_input(pin) == 0) { - set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW); + irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW); } else { printk(KERN_ERR "rd88f5182_pci_preinit faield to " "set_irq_type pin %d\n", pin); @@ -161,7 +161,7 @@ void __init rd88f5182_pci_preinit(void) pin = RD88F5182_PCI_SLOT0_IRQ_B_PIN; if (gpio_request(pin, "PCI IntB") == 0) { if (gpio_direction_input(pin) == 0) { - set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW); + irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW); } else { printk(KERN_ERR "rd88f5182_pci_preinit faield to " "set_irq_type pin %d\n", pin); @@ -308,6 +308,7 @@ MACHINE_START(RD88F5182, "Marvell Orion-NAS Reference Design") .boot_params = 0x00000100, .init_machine = rd88f5182_init, .map_io = orion5x_map_io, + .init_early = orion5x_init_early, .init_irq = orion5x_init_irq, .timer = &orion5x_timer, MACHINE_END diff --git a/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c b/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c index 02ff45f3e2e..b080c6966d1 100644 --- a/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c +++ b/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c @@ -126,6 +126,7 @@ MACHINE_START(RD88F6183AP_GE, "Marvell Orion-1-90 AP GE Reference Design") .boot_params = 0x00000100, .init_machine = rd88f6183ap_ge_init, .map_io = orion5x_map_io, + .init_early = orion5x_init_early, .init_irq = orion5x_init_irq, .timer = &orion5x_timer, .fixup = tag_fixup_mem32, diff --git a/arch/arm/mach-orion5x/terastation_pro2-setup.c b/arch/arm/mach-orion5x/terastation_pro2-setup.c index 4403fae5ab0..61600414391 100644 --- a/arch/arm/mach-orion5x/terastation_pro2-setup.c +++ b/arch/arm/mach-orion5x/terastation_pro2-setup.c @@ -88,7 +88,7 @@ void __init tsp2_pci_preinit(void) pin = TSP2_PCI_SLOT0_IRQ_PIN; if (gpio_request(pin, "PCI Int1") == 0) { if (gpio_direction_input(pin) == 0) { - set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW); + irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW); } else { printk(KERN_ERR "tsp2_pci_preinit failed " "to set_irq_type pin %d\n", pin); @@ -361,6 +361,7 @@ MACHINE_START(TERASTATION_PRO2, "Buffalo Terastation Pro II/Live") .boot_params = 0x00000100, .init_machine = tsp2_init, .map_io = orion5x_map_io, + .init_early = orion5x_init_early, .init_irq = orion5x_init_irq, .timer = &orion5x_timer, .fixup = tag_fixup_mem32, diff --git a/arch/arm/mach-orion5x/ts209-setup.c b/arch/arm/mach-orion5x/ts209-setup.c index 1e196129d76..f0f43e13ac8 100644 --- a/arch/arm/mach-orion5x/ts209-setup.c +++ b/arch/arm/mach-orion5x/ts209-setup.c @@ -117,7 +117,7 @@ void __init qnap_ts209_pci_preinit(void) pin = QNAP_TS209_PCI_SLOT0_IRQ_PIN; if (gpio_request(pin, "PCI Int1") == 0) { if (gpio_direction_input(pin) == 0) { - set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW); + irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW); } else { printk(KERN_ERR "qnap_ts209_pci_preinit failed to " "set_irq_type pin %d\n", pin); @@ -131,7 +131,7 @@ void __init qnap_ts209_pci_preinit(void) pin = QNAP_TS209_PCI_SLOT1_IRQ_PIN; if (gpio_request(pin, "PCI Int2") == 0) { if (gpio_direction_input(pin) == 0) { - set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW); + irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW); } else { printk(KERN_ERR "qnap_ts209_pci_preinit failed " "to set_irq_type pin %d\n", pin); @@ -325,6 +325,7 @@ MACHINE_START(TS209, "QNAP TS-109/TS-209") .boot_params = 0x00000100, .init_machine = qnap_ts209_init, .map_io = orion5x_map_io, + .init_early = orion5x_init_early, .init_irq = orion5x_init_irq, .timer = &orion5x_timer, .fixup = tag_fixup_mem32, diff --git a/arch/arm/mach-orion5x/ts409-setup.c b/arch/arm/mach-orion5x/ts409-setup.c index 428af2046e3..92f393f08fa 100644 --- a/arch/arm/mach-orion5x/ts409-setup.c +++ b/arch/arm/mach-orion5x/ts409-setup.c @@ -314,6 +314,7 @@ MACHINE_START(TS409, "QNAP TS-409") .boot_params = 0x00000100, .init_machine = qnap_ts409_init, .map_io = orion5x_map_io, + .init_early = orion5x_init_early, .init_irq = orion5x_init_irq, .timer = &orion5x_timer, .fixup = tag_fixup_mem32, diff --git a/arch/arm/mach-orion5x/ts78xx-fpga.h b/arch/arm/mach-orion5x/ts78xx-fpga.h index 37b3d487529..151e89e1e67 100644 --- a/arch/arm/mach-orion5x/ts78xx-fpga.h +++ b/arch/arm/mach-orion5x/ts78xx-fpga.h @@ -1,3 +1,4 @@ +#define TS7800_FPGA_MAGIC 0x00b480 #define FPGAID(_magic, _rev) ((_magic << 8) + _rev) /* @@ -6,11 +7,15 @@ */ enum fpga_ids { /* Technologic Systems */ - TS7800_REV_1 = FPGAID(0x00b480, 0x01), - TS7800_REV_2 = FPGAID(0x00b480, 0x02), - TS7800_REV_3 = FPGAID(0x00b480, 0x03), - TS7800_REV_4 = FPGAID(0x00b480, 0x04), - TS7800_REV_5 = FPGAID(0x00b480, 0x05), + TS7800_REV_1 = FPGAID(TS7800_FPGA_MAGIC, 0x01), + TS7800_REV_2 = FPGAID(TS7800_FPGA_MAGIC, 0x02), + TS7800_REV_3 = FPGAID(TS7800_FPGA_MAGIC, 0x03), + TS7800_REV_4 = FPGAID(TS7800_FPGA_MAGIC, 0x04), + TS7800_REV_5 = FPGAID(TS7800_FPGA_MAGIC, 0x05), + TS7800_REV_6 = FPGAID(TS7800_FPGA_MAGIC, 0x06), + TS7800_REV_7 = FPGAID(TS7800_FPGA_MAGIC, 0x07), + TS7800_REV_8 = FPGAID(TS7800_FPGA_MAGIC, 0x08), + TS7800_REV_9 = FPGAID(TS7800_FPGA_MAGIC, 0x09), /* Unaffordable & Expensive */ UAE_DUMMY = FPGAID(0xffffff, 0x01), diff --git a/arch/arm/mach-orion5x/ts78xx-setup.c b/arch/arm/mach-orion5x/ts78xx-setup.c index c1c1cd04bdd..edb1dd2d161 100644 --- a/arch/arm/mach-orion5x/ts78xx-setup.c +++ b/arch/arm/mach-orion5x/ts78xx-setup.c @@ -191,6 +191,60 @@ static int ts78xx_ts_nand_dev_ready(struct mtd_info *mtd) return readb(TS_NAND_CTRL) & 0x20; } +static void ts78xx_ts_nand_write_buf(struct mtd_info *mtd, + const uint8_t *buf, int len) +{ + struct nand_chip *chip = mtd->priv; + void __iomem *io_base = chip->IO_ADDR_W; + unsigned long off = ((unsigned long)buf & 3); + int sz; + + if (off) { + sz = min_t(int, 4 - off, len); + writesb(io_base, buf, sz); + buf += sz; + len -= sz; + } + + sz = len >> 2; + if (sz) { + u32 *buf32 = (u32 *)buf; + writesl(io_base, buf32, sz); + buf += sz << 2; + len -= sz << 2; + } + + if (len) + writesb(io_base, buf, len); +} + +static void ts78xx_ts_nand_read_buf(struct mtd_info *mtd, + uint8_t *buf, int len) +{ + struct nand_chip *chip = mtd->priv; + void __iomem *io_base = chip->IO_ADDR_R; + unsigned long off = ((unsigned long)buf & 3); + int sz; + + if (off) { + sz = min_t(int, 4 - off, len); + readsb(io_base, buf, sz); + buf += sz; + len -= sz; + } + + sz = len >> 2; + if (sz) { + u32 *buf32 = (u32 *)buf; + readsl(io_base, buf32, sz); + buf += sz << 2; + len -= sz << 2; + } + + if (len) + readsb(io_base, buf, len); +} + const char *ts_nand_part_probes[] = { "cmdlinepart", NULL }; static struct mtd_partition ts78xx_ts_nand_parts[] = { @@ -233,6 +287,8 @@ static struct platform_nand_data ts78xx_ts_nand_data = { */ .cmd_ctrl = ts78xx_ts_nand_cmd_ctrl, .dev_ready = ts78xx_ts_nand_dev_ready, + .write_buf = ts78xx_ts_nand_write_buf, + .read_buf = ts78xx_ts_nand_read_buf, }, }; @@ -334,14 +390,29 @@ static void ts78xx_fpga_supports(void) case TS7800_REV_3: case TS7800_REV_4: case TS7800_REV_5: + case TS7800_REV_6: + case TS7800_REV_7: + case TS7800_REV_8: + case TS7800_REV_9: ts78xx_fpga.supports.ts_rtc.present = 1; ts78xx_fpga.supports.ts_nand.present = 1; ts78xx_fpga.supports.ts_rng.present = 1; break; default: - ts78xx_fpga.supports.ts_rtc.present = 0; - ts78xx_fpga.supports.ts_nand.present = 0; - ts78xx_fpga.supports.ts_rng.present = 0; + /* enable devices if magic matches */ + switch ((ts78xx_fpga.id >> 8) & 0xffffff) { + case TS7800_FPGA_MAGIC: + pr_warning("TS-7800 FPGA: unrecognized revision 0x%.2x\n", + ts78xx_fpga.id & 0xff); + ts78xx_fpga.supports.ts_rtc.present = 1; + ts78xx_fpga.supports.ts_nand.present = 1; + ts78xx_fpga.supports.ts_rng.present = 1; + break; + default: + ts78xx_fpga.supports.ts_rtc.present = 0; + ts78xx_fpga.supports.ts_nand.present = 0; + ts78xx_fpga.supports.ts_rng.present = 0; + } } } @@ -352,7 +423,7 @@ static int ts78xx_fpga_load_devices(void) if (ts78xx_fpga.supports.ts_rtc.present == 1) { tmp = ts78xx_ts_rtc_load(); if (tmp) { - printk(KERN_INFO "TS-78xx: RTC not registered\n"); + pr_info("TS-78xx: RTC not registered\n"); ts78xx_fpga.supports.ts_rtc.present = 0; } ret |= tmp; @@ -360,7 +431,7 @@ static int ts78xx_fpga_load_devices(void) if (ts78xx_fpga.supports.ts_nand.present == 1) { tmp = ts78xx_ts_nand_load(); if (tmp) { - printk(KERN_INFO "TS-78xx: NAND not registered\n"); + pr_info("TS-78xx: NAND not registered\n"); ts78xx_fpga.supports.ts_nand.present = 0; } ret |= tmp; @@ -368,7 +439,7 @@ static int ts78xx_fpga_load_devices(void) if (ts78xx_fpga.supports.ts_rng.present == 1) { tmp = ts78xx_ts_rng_load(); if (tmp) { - printk(KERN_INFO "TS-78xx: RNG not registered\n"); + pr_info("TS-78xx: RNG not registered\n"); ts78xx_fpga.supports.ts_rng.present = 0; } ret |= tmp; @@ -395,7 +466,7 @@ static int ts78xx_fpga_load(void) { ts78xx_fpga.id = readl(TS78XX_FPGA_REGS_VIRT_BASE); - printk(KERN_INFO "TS-78xx FPGA: magic=0x%.6x, rev=0x%.2x\n", + pr_info("TS-78xx FPGA: magic=0x%.6x, rev=0x%.2x\n", (ts78xx_fpga.id >> 8) & 0xffffff, ts78xx_fpga.id & 0xff); @@ -423,7 +494,7 @@ static int ts78xx_fpga_unload(void) * UrJTAG SVN since r1381 can be used to reprogram the FPGA */ if (ts78xx_fpga.id != fpga_id) { - printk(KERN_ERR "TS-78xx FPGA: magic/rev mismatch\n" + pr_err("TS-78xx FPGA: magic/rev mismatch\n" "TS-78xx FPGA: was 0x%.6x/%.2x but now 0x%.6x/%.2x\n", (ts78xx_fpga.id >> 8) & 0xffffff, ts78xx_fpga.id & 0xff, (fpga_id >> 8) & 0xffffff, fpga_id & 0xff); @@ -454,7 +525,7 @@ static ssize_t ts78xx_fpga_store(struct kobject *kobj, int value, ret; if (ts78xx_fpga.state < 0) { - printk(KERN_ERR "TS-78xx FPGA: borked, you must powercycle asap\n"); + pr_err("TS-78xx FPGA: borked, you must powercycle asap\n"); return -EBUSY; } @@ -463,7 +534,7 @@ static ssize_t ts78xx_fpga_store(struct kobject *kobj, else if (strncmp(buf, "offline", sizeof("offline") - 1) == 0) value = 0; else { - printk(KERN_ERR "ts78xx_fpga_store: Invalid value\n"); + pr_err("ts78xx_fpga_store: Invalid value\n"); return -EINVAL; } @@ -545,7 +616,7 @@ static void __init ts78xx_init(void) ret = ts78xx_fpga_load(); ret = sysfs_create_file(power_kobj, &ts78xx_fpga_attr.attr); if (ret) - printk(KERN_ERR "sysfs_create_file failed: %d\n", ret); + pr_err("sysfs_create_file failed: %d\n", ret); } MACHINE_START(TS78XX, "Technologic Systems TS-78xx SBC") @@ -553,6 +624,7 @@ MACHINE_START(TS78XX, "Technologic Systems TS-78xx SBC") .boot_params = 0x00000100, .init_machine = ts78xx_init, .map_io = ts78xx_map_io, + .init_early = orion5x_init_early, .init_irq = orion5x_init_irq, .timer = &orion5x_timer, MACHINE_END diff --git a/arch/arm/mach-orion5x/wnr854t-setup.c b/arch/arm/mach-orion5x/wnr854t-setup.c index 7994d6ec08a..4e5216be074 100644 --- a/arch/arm/mach-orion5x/wnr854t-setup.c +++ b/arch/arm/mach-orion5x/wnr854t-setup.c @@ -175,6 +175,7 @@ MACHINE_START(WNR854T, "Netgear WNR854T") .boot_params = 0x00000100, .init_machine = wnr854t_init, .map_io = orion5x_map_io, + .init_early = orion5x_init_early, .init_irq = orion5x_init_irq, .timer = &orion5x_timer, .fixup = tag_fixup_mem32, diff --git a/arch/arm/mach-orion5x/wrt350n-v2-setup.c b/arch/arm/mach-orion5x/wrt350n-v2-setup.c index a5989b7eb53..fab79d09cc5 100644 --- a/arch/arm/mach-orion5x/wrt350n-v2-setup.c +++ b/arch/arm/mach-orion5x/wrt350n-v2-setup.c @@ -263,6 +263,7 @@ MACHINE_START(WRT350N_V2, "Linksys WRT350N v2") .boot_params = 0x00000100, .init_machine = wrt350n_v2_init, .map_io = orion5x_map_io, + .init_early = orion5x_init_early, .init_irq = orion5x_init_irq, .timer = &orion5x_timer, .fixup = tag_fixup_mem32, |