aboutsummaryrefslogtreecommitdiff
path: root/arch/arm/mach-omap2/id.c
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm/mach-omap2/id.c')
-rw-r--r--arch/arm/mach-omap2/id.c64
1 files changed, 48 insertions, 16 deletions
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index 37b8a1a4adf..e8256a2ed8e 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -25,6 +25,8 @@
#include <plat/control.h>
#include <plat/cpu.h>
+#include <mach/id.h>
+
static struct omap_chip_id omap_chip;
static unsigned int omap_revision;
@@ -102,30 +104,36 @@ static struct omap_id omap_ids[] __initdata = {
static void __iomem *tap_base;
static u16 tap_prod_id;
-void __init omap24xx_check_revision(void)
+void omap_get_die_id(struct omap_die_id *odi)
+{
+ odi->id_0 = read_tap_reg(OMAP_TAP_DIE_ID_0);
+ odi->id_1 = read_tap_reg(OMAP_TAP_DIE_ID_1);
+ odi->id_2 = read_tap_reg(OMAP_TAP_DIE_ID_2);
+ odi->id_3 = read_tap_reg(OMAP_TAP_DIE_ID_3);
+}
+
+static void __init omap24xx_check_revision(void)
{
int i, j;
u32 idcode, prod_id;
u16 hawkeye;
u8 dev_type, rev;
+ struct omap_die_id odi;
idcode = read_tap_reg(OMAP_TAP_IDCODE);
prod_id = read_tap_reg(tap_prod_id);
hawkeye = (idcode >> 12) & 0xffff;
rev = (idcode >> 28) & 0x0f;
dev_type = (prod_id >> 16) & 0x0f;
+ omap_get_die_id(&odi);
pr_debug("OMAP_TAP_IDCODE 0x%08x REV %i HAWKEYE 0x%04x MANF %03x\n",
idcode, rev, hawkeye, (idcode >> 1) & 0x7ff);
- pr_debug("OMAP_TAP_DIE_ID_0: 0x%08x\n",
- read_tap_reg(OMAP_TAP_DIE_ID_0));
+ pr_debug("OMAP_TAP_DIE_ID_0: 0x%08x\n", odi.id_0);
pr_debug("OMAP_TAP_DIE_ID_1: 0x%08x DEV_REV: %i\n",
- read_tap_reg(OMAP_TAP_DIE_ID_1),
- (read_tap_reg(OMAP_TAP_DIE_ID_1) >> 28) & 0xf);
- pr_debug("OMAP_TAP_DIE_ID_2: 0x%08x\n",
- read_tap_reg(OMAP_TAP_DIE_ID_2));
- pr_debug("OMAP_TAP_DIE_ID_3: 0x%08x\n",
- read_tap_reg(OMAP_TAP_DIE_ID_3));
+ odi.id_1, (odi.id_1 >> 28) & 0xf);
+ pr_debug("OMAP_TAP_DIE_ID_2: 0x%08x\n", odi.id_2);
+ pr_debug("OMAP_TAP_DIE_ID_3: 0x%08x\n", odi.id_3);
pr_debug("OMAP_TAP_PROD_ID_0: 0x%08x DEV_TYPE: %i\n",
prod_id, dev_type);
@@ -164,7 +172,7 @@ void __init omap24xx_check_revision(void)
omap3_features |= OMAP3_HAS_ ##feat; \
}
-void __init omap3_check_features(void)
+static void __init omap3_check_features(void)
{
u32 status;
@@ -179,6 +187,8 @@ void __init omap3_check_features(void)
OMAP3_CHECK_FEATURE(status, ISP);
if (cpu_is_omap3630())
omap3_features |= OMAP3_HAS_192MHZ_CLK;
+ if (!cpu_is_omap3505() && !cpu_is_omap3517())
+ omap3_features |= OMAP3_HAS_IO_WAKEUP;
/*
* TODO: Get additional info (where applicable)
@@ -186,7 +196,7 @@ void __init omap3_check_features(void)
*/
}
-void __init omap3_check_revision(void)
+static void __init omap3_check_revision(void)
{
u32 cpuid, idcode;
u16 hawkeye;
@@ -259,15 +269,31 @@ void __init omap3_check_revision(void)
omap_chip.oc |= CHIP_IS_OMAP3430ES3_1;
break;
case 0xb891:
- /* FALLTHROUGH */
+ /* Handle 36xx devices */
+ omap_chip.oc |= CHIP_IS_OMAP3630ES1;
+
+ switch(rev) {
+ case 0: /* Take care of early samples */
+ omap_revision = OMAP3630_REV_ES1_0;
+ break;
+ case 1:
+ omap_revision = OMAP3630_REV_ES1_1;
+ omap_chip.oc |= CHIP_IS_OMAP3630ES1_1;
+ break;
+ case 2:
+ default:
+ omap_revision = OMAP3630_REV_ES1_2;
+ omap_chip.oc |= CHIP_IS_OMAP3630ES1_2;
+ break;
+ }
default:
/* Unknown default to latest silicon rev as default*/
- omap_revision = OMAP3630_REV_ES1_0;
- omap_chip.oc |= CHIP_IS_OMAP3630ES1;
+ omap_revision = OMAP3630_REV_ES1_2;
+ omap_chip.oc |= CHIP_IS_OMAP3630ES1_2;
}
}
-void __init omap4_check_revision(void)
+static void __init omap4_check_revision(void)
{
u32 idcode;
u16 hawkeye;
@@ -297,7 +323,7 @@ void __init omap4_check_revision(void)
if (omap3_has_ ##feat()) \
printk(#feat" ");
-void __init omap3_cpuinfo(void)
+static void __init omap3_cpuinfo(void)
{
u8 rev = GET_OMAP_REVISION();
char cpu_name[16], cpu_rev[16];
@@ -339,6 +365,12 @@ void __init omap3_cpuinfo(void)
case OMAP_REVBITS_00:
strcpy(cpu_rev, "1.0");
break;
+ case OMAP_REVBITS_01:
+ strcpy(cpu_rev, "1.1");
+ break;
+ case OMAP_REVBITS_02:
+ strcpy(cpu_rev, "1.2");
+ break;
case OMAP_REVBITS_10:
strcpy(cpu_rev, "2.0");
break;