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authorAlan Tull <alan.tull@freescale.com>2011-06-28 11:18:05 -0500
committerEric Miao <eric.miao@canonical.com>2011-11-10 07:38:50 +0800
commitafb8d133ff4d5079667795a94fa3442c7f5fe3fa (patch)
treed3056b72914e25b0194c2bda64b276a637738f7e /include
parent2e5e59c291e1b6800809290a3069f8592b4bd293 (diff)
ENGR00139265-2 mxc alsa soc spdif driver
* Add spdif block clock divider settings and spdif_clk_set_rate function to mxc_spdif_platform_data. Signed-off-by: Alan Tull <alan.tull@freescale.com>
Diffstat (limited to 'include')
-rw-r--r--include/linux/fsl_devices.h6
1 files changed, 5 insertions, 1 deletions
diff --git a/include/linux/fsl_devices.h b/include/linux/fsl_devices.h
index 4f9e869a4fa..0f75c656f00 100644
--- a/include/linux/fsl_devices.h
+++ b/include/linux/fsl_devices.h
@@ -325,7 +325,11 @@ struct mxc_spdif_platform_data {
int spdif_rx; /* S/PDIF rx enabled for this board */
int spdif_clk_44100; /* tx clk mux in SPDIF_REG_STC; -1 for none */
int spdif_clk_48000; /* tx clk mux in SPDIF_REG_STC; -1 for none */
- int spdif_clkid; /* rx clk mux select in SPDIF_REG_SRPC */
+ int spdif_div_44100; /* tx clk div in SPDIF_REG_STC */
+ int spdif_div_48000; /* tx clk div in SPDIF_REG_STC */
+ int spdif_div_32000; /* tx clk div in SPDIF_REG_STC */
+ int spdif_rx_clk; /* rx clk mux select in SPDIF_REG_SRPC */
+ int (*spdif_clk_set_rate) (struct clk *clk, unsigned long rate);
struct clk *spdif_clk;
struct clk *spdif_core_clk;
struct clk *spdif_audio_clk;