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authorJason Chen <b02280@freescale.com>2011-09-06 14:06:09 +0800
committerEric Miao <eric.miao@linaro.org>2011-11-15 16:28:23 +0800
commite3890c94e871bbf10aa331cb28763f4c6cd05ed0 (patch)
treea547d3a0c26f26787fae61d1780e6cdd1f1267e2 /drivers/mxc/ipu3/ipu_prv.h
parent3e61b0c69bced2cc1d7359fa770e4b426de24827 (diff)
downloadlinux-linaro-e3890c94e871bbf10aa331cb28763f4c6cd05ed0.tar.gz
ENGR00155146 ipuv3: use mutex instead of spin lock
keep spin lock for irq function, but use mutex replace other splin lock to provide better sync method. Add _ipu_get/put function to check clock enable. Signed-off-by: Jason Chen <b02280@freescale.com>
Diffstat (limited to 'drivers/mxc/ipu3/ipu_prv.h')
-rw-r--r--drivers/mxc/ipu3/ipu_prv.h18
1 files changed, 15 insertions, 3 deletions
diff --git a/drivers/mxc/ipu3/ipu_prv.h b/drivers/mxc/ipu3/ipu_prv.h
index dfb7b38bc44..fdb48458761 100644
--- a/drivers/mxc/ipu3/ipu_prv.h
+++ b/drivers/mxc/ipu3/ipu_prv.h
@@ -16,6 +16,7 @@
#include <linux/types.h>
#include <linux/device.h>
#include <mach/clock.h>
+#include <linux/clkdev.h>
#include <linux/interrupt.h>
#include <linux/fsl_devices.h>
@@ -27,6 +28,8 @@
/* Globals */
extern int dmfc_type_setup;
+extern struct clk ipu_pixel_clk[];
+extern struct clk_lookup ipu_lookups[];
#define IDMA_CHAN_INVALID 0xFF
#define HIGH_RESOLUTION_WIDTH 1024
@@ -50,7 +53,6 @@ enum csc_type_t {
struct ipu_soc {
/*clk*/
struct clk *ipu_clk;
- bool clk_enabled;
struct clk *di_clk[2];
struct clk *csi_clk[2];
struct clk pixel_clk[2];
@@ -76,7 +78,6 @@ struct ipu_soc {
u32 *disp_base[2];
u32 *vdi_reg;
- spinlock_t ipu_lock;
struct device *dev;
ipu_channel_t csi_channel[2];
@@ -89,6 +90,7 @@ struct ipu_soc {
uint32_t channel_enable_mask;
/*use count*/
+ atomic_t ipu_use_count;
int dc_use_count;
int dp_use_count;
int dmfc_use_count;
@@ -99,6 +101,9 @@ struct ipu_soc {
int di_use_count[2];
int csi_use_count[2];
+ struct mutex mutex_lock;
+ spinlock_t spin_lock;
+
int dmfc_size_28;
int dmfc_size_29;
int dmfc_size_24;
@@ -315,5 +320,12 @@ void _ipu_csi_ccir_err_detection_disable(struct ipu_soc *ipu, uint32_t csi);
void _ipu_smfc_init(struct ipu_soc *ipu, ipu_channel_t channel, uint32_t mipi_id, uint32_t csi);
void _ipu_smfc_set_burst_size(struct ipu_soc *ipu, ipu_channel_t channel, uint32_t bs);
void _ipu_dp_set_csc_coefficients(struct ipu_soc *ipu, ipu_channel_t channel, int32_t param[][3]);
-
+int32_t _ipu_disp_set_window_pos(struct ipu_soc *ipu, ipu_channel_t channel,
+ int16_t x_pos, int16_t y_pos);
+int32_t _ipu_disp_get_window_pos(struct ipu_soc *ipu, ipu_channel_t channel,
+ int16_t *x_pos, int16_t *y_pos);
+void _ipu_get(struct ipu_soc *ipu);
+void _ipu_put(struct ipu_soc *ipu);
+void _ipu_lock(struct ipu_soc *ipu);
+void _ipu_unlock(struct ipu_soc *ipu);
#endif /* __INCLUDE_IPU_PRV_H__ */