Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus

* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus:
  [MIPS] Ocelot: remove remaining bits
  [MIPS] TLB: Fix instruction bitmasks
  [MIPS] R10000: Fix wrong test in dma-default.c
  [MIPS] Provide empty irq_enable_hazard definition for legacy and R1 cores.
  [MIPS] Sibyte: Remove broken dependency on EXPERIMENTAL from SIBYTE_SB1xxx_SOC.
  [MIPS] Kconfig: whitespace cleanup.
  [MIPS] PCI: Set need_domain_info if controller domain index is non-zero.
  [MIPS] BCM1480: Fix computation of interrupt mask address register.
  [MIPS] i8259: Add disable method.
  [MIPS] tty: add the new ioctls and definitions.

7 files changed, 13 insertions, 26 deletions

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 04797b289c2..3b807b4bc7c 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -80,10 +80,10 @@ config MACH_DECSTATION
 	  If you have one of the following DECstation Models you definitely
 	  want to choose R4xx0 for the CPU Type:
 
-	  	DECstation 5000/50
-	  	DECstation 5000/150
-	  	DECstation 5000/260
-	  	DECsystem 5900/260
+		DECstation 5000/50
+		DECstation 5000/150
+		DECstation 5000/260
+		DECsystem 5900/260
 
 	  otherwise choose R3000.
 
@@ -818,20 +818,6 @@ config EMMA2RH
 config SERIAL_RM9000
 	bool
 
-#
-# Unfortunately not all GT64120 systems run the chip at the same clock.
-# As the user for the clock rate and try to minimize the available options.
-#
-choice
-	prompt "Galileo Chip Clock"
-	depends on MOMENCO_OCELOT
-	default SYSCLK_100 if MOMENCO_OCELOT
-
-config SYSCLK_100
-	bool "100" if MOMENCO_OCELOT
-
-endchoice
-
 config ARC32
 	bool
 
diff --git a/arch/mips/kernel/i8259.c b/arch/mips/kernel/i8259.c
index 2345160e63f..b6c30800c66 100644
--- a/arch/mips/kernel/i8259.c
+++ b/arch/mips/kernel/i8259.c
@@ -36,6 +36,7 @@ void mask_and_ack_8259A(unsigned int);
 static struct irq_chip i8259A_chip = {
 	.name		= "XT-PIC",
 	.mask		= disable_8259A_irq,
+	.disable	= disable_8259A_irq,
 	.unmask		= enable_8259A_irq,
 	.mask_ack	= mask_and_ack_8259A,
 };
diff --git a/arch/mips/mm/dma-default.c b/arch/mips/mm/dma-default.c
index 76903c72764..f60b3dc0fc6 100644
--- a/arch/mips/mm/dma-default.c
+++ b/arch/mips/mm/dma-default.c
@@ -35,7 +35,7 @@ static inline unsigned long dma_addr_to_virt(dma_addr_t dma_addr)
 static inline int cpu_is_noncoherent_r10000(struct device *dev)
 {
 	return !plat_device_is_coherent(dev) &&
-	       (current_cpu_data.cputype == CPU_R10000 &&
+	       (current_cpu_data.cputype == CPU_R10000 ||
 	       current_cpu_data.cputype == CPU_R12000);
 }
 
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index 4ec0964b839..9cb39644b6f 100644
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -78,7 +78,7 @@ enum fields
 	SET = 0x200
 };
 
-#define OP_MASK		0x2f
+#define OP_MASK		0x3f
 #define OP_SH		26
 #define RS_MASK		0x1f
 #define RS_SH		21
@@ -92,7 +92,7 @@ enum fields
 #define IMM_SH		0
 #define JIMM_MASK	0x3ffffff
 #define JIMM_SH		0
-#define FUNC_MASK	0x2f
+#define FUNC_MASK	0x3f
 #define FUNC_SH		0
 #define SET_MASK	0x7
 #define SET_SH		0
diff --git a/arch/mips/pci/pci.c b/arch/mips/pci/pci.c
index 6c5c684d142..589b745d822 100644
--- a/arch/mips/pci/pci.c
+++ b/arch/mips/pci/pci.c
@@ -141,6 +141,7 @@ static int __init pcibios_init(void)
 
 		bus = pci_scan_bus(next_busno, hose->pci_ops, hose);
 		hose->bus = bus;
+		need_domain_info = need_domain_info || hose->index;
 		hose->need_domain_info = need_domain_info;
 		if (bus) {
 			next_busno = bus->subordinate + 1;
diff --git a/arch/mips/sibyte/Kconfig b/arch/mips/sibyte/Kconfig
index e6b003ec671..fdd7bd98fb4 100644
--- a/arch/mips/sibyte/Kconfig
+++ b/arch/mips/sibyte/Kconfig
@@ -48,7 +48,6 @@ config SIBYTE_BCM1x55
 
 config SIBYTE_SB1xxx_SOC
 	bool
-	depends on EXPERIMENTAL
 	select DMA_COHERENT
 	select SIBYTE_CFE
 	select SWAP_IO_SPACE
diff --git a/arch/mips/sibyte/bcm1480/irq.c b/arch/mips/sibyte/bcm1480/irq.c
index 79ae6ef979b..e729b5f3026 100644
--- a/arch/mips/sibyte/bcm1480/irq.c
+++ b/arch/mips/sibyte/bcm1480/irq.c
@@ -100,8 +100,8 @@ DEFINE_SPINLOCK(bcm1480_imr_lock);
 
 void bcm1480_mask_irq(int cpu, int irq)
 {
-	unsigned long flags;
-	u64 cur_ints,hl_spacing;
+	unsigned long flags, hl_spacing;
+	u64 cur_ints;
 
 	spin_lock_irqsave(&bcm1480_imr_lock, flags);
 	hl_spacing = 0;
@@ -117,8 +117,8 @@ void bcm1480_mask_irq(int cpu, int irq)
 
 void bcm1480_unmask_irq(int cpu, int irq)
 {
-	unsigned long flags;
-	u64 cur_ints,hl_spacing;
+	unsigned long flags, hl_spacing;
+	u64 cur_ints;
 
 	spin_lock_irqsave(&bcm1480_imr_lock, flags);
 	hl_spacing = 0;