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authorChuck Ebbert <76306.1226@compuserve.com>2005-09-12 18:49:25 +0200
committerLinus Torvalds <torvalds@g5.osdl.org>2005-09-12 10:50:58 -0700
commit66759a01adbfe8828dd063e32cf5ed3f46696181 (patch)
tree9d34afafa1e4e5371a0e732a3f949ef8ac533ab5 /arch
parent049cdefe19f95b67b06b70915cd8e4ae7173337a (diff)
[PATCH] x86-64: i386/x86-64: Fix time going twice as fast problem on ATI Xpress chipsets
Original patch from Bertro Simul This is probably still not quite correct, but seems to be the best solution so far. Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/i386/kernel/acpi/earlyquirk.c7
-rw-r--r--arch/i386/kernel/io_apic.c4
-rw-r--r--arch/i386/kernel/setup.c5
-rw-r--r--arch/x86_64/kernel/io_apic.c13
-rw-r--r--arch/x86_64/kernel/setup.c5
5 files changed, 34 insertions, 0 deletions
diff --git a/arch/i386/kernel/acpi/earlyquirk.c b/arch/i386/kernel/acpi/earlyquirk.c
index f1b9d2a46da..087ecc67e9b 100644
--- a/arch/i386/kernel/acpi/earlyquirk.c
+++ b/arch/i386/kernel/acpi/earlyquirk.c
@@ -15,6 +15,13 @@ static int __init check_bridge(int vendor, int device)
if (vendor == PCI_VENDOR_ID_NVIDIA) {
acpi_skip_timer_override = 1;
}
+ /*
+ * ATI IXP chipsets get double timer interrupts.
+ * For now just do this for all ATI chipsets.
+ * FIXME: this needs to be checked for the non ACPI case too.
+ */
+ if (vendor == PCI_VENDOR_ID_ATI)
+ disable_timer_pin_1 = 1;
return 0;
}
diff --git a/arch/i386/kernel/io_apic.c b/arch/i386/kernel/io_apic.c
index 35d3ce26a54..378313b0cce 100644
--- a/arch/i386/kernel/io_apic.c
+++ b/arch/i386/kernel/io_apic.c
@@ -60,6 +60,8 @@ int sis_apic_bug = -1;
*/
int nr_ioapic_registers[MAX_IO_APICS];
+int disable_timer_pin_1 __initdata;
+
/*
* Rough estimation of how many shared IRQs there are, can
* be changed anytime.
@@ -2211,6 +2213,8 @@ static inline void check_timer(void)
setup_nmi();
enable_8259A_irq(0);
}
+ if (disable_timer_pin_1 > 0)
+ clear_IO_APIC_pin(0, pin1);
return;
}
clear_IO_APIC_pin(0, pin1);
diff --git a/arch/i386/kernel/setup.c b/arch/i386/kernel/setup.c
index f3d808451d2..dc39ca6a7ec 100644
--- a/arch/i386/kernel/setup.c
+++ b/arch/i386/kernel/setup.c
@@ -851,6 +851,11 @@ static void __init parse_cmdline_early (char ** cmdline_p)
#endif
#ifdef CONFIG_X86_LOCAL_APIC
+ if (!memcmp(from, "disable_timer_pin_1", 19))
+ disable_timer_pin_1 = 1;
+ if (!memcmp(from, "enable_timer_pin_1", 18))
+ disable_timer_pin_1 = -1;
+
/* disable IO-APIC */
else if (!memcmp(from, "noapic", 6))
disable_ioapic_setup();
diff --git a/arch/x86_64/kernel/io_apic.c b/arch/x86_64/kernel/io_apic.c
index 961b519bda5..522944a000a 100644
--- a/arch/x86_64/kernel/io_apic.c
+++ b/arch/x86_64/kernel/io_apic.c
@@ -44,6 +44,8 @@ int sis_apic_bug; /* not actually supported, dummy for compile */
static int no_timer_check;
+int disable_timer_pin_1 __initdata;
+
static DEFINE_SPINLOCK(ioapic_lock);
/*
@@ -297,6 +299,15 @@ void __init check_ioapic(void)
#endif
/* RED-PEN skip them on mptables too? */
return;
+ case PCI_VENDOR_ID_ATI:
+ /* All timer interrupts on atiixp
+ are doubled. Disable one. */
+ if (disable_timer_pin_1 == 0) {
+ disable_timer_pin_1 = 1;
+ printk(KERN_INFO
+ "ATI board detected. Disabling timer pin 1.\n");
+ }
+ return;
}
/* No multi-function device? */
@@ -1658,6 +1669,8 @@ static inline void check_timer(void)
setup_nmi();
enable_8259A_irq(0);
}
+ if (disable_timer_pin_1 > 0)
+ clear_IO_APIC_pin(0, pin1);
return;
}
clear_IO_APIC_pin(0, pin1);
diff --git a/arch/x86_64/kernel/setup.c b/arch/x86_64/kernel/setup.c
index 869770da293..351d8d64c2f 100644
--- a/arch/x86_64/kernel/setup.c
+++ b/arch/x86_64/kernel/setup.c
@@ -336,6 +336,11 @@ static __init void parse_cmdline_early (char ** cmdline_p)
#endif
#endif
+ if (!memcmp(from, "disable_timer_pin_1", 19))
+ disable_timer_pin_1 = 1;
+ if (!memcmp(from, "enable_timer_pin_1", 18))
+ disable_timer_pin_1 = -1;
+
if (!memcmp(from, "nolapic", 7) ||
!memcmp(from, "disableapic", 11))
disable_apic = 1;