diff options
| author | Dinh Nguyen <Dinh.Nguyen@freescale.com> | 2010-08-17 14:51:31 -0500 |
|---|---|---|
| committer | Dinh Nguyen <Dinh.Nguyen@freescale.com> | 2010-08-31 10:41:03 -0500 |
| commit | 5b334e64580020bd0d629c6211881267038add7b (patch) | |
| tree | 1571ba375d8f09e7b34e38c5aad0d2c1037b2c69 /arch/arm/plat-mxc/pwm.c | |
| parent | 9af4474b9e8d3ffe84a065446b900f4278f87e59 (diff) | |
ENGR00126692-1: MX5X: Upgrade kernel to 2.6.35
This patch contains changes to plat-mxc files.
Contains all checkpatch and copyright fixes.
Acked-by: Rob Herring <r.herring@freescale.com>
Signed-off-by: Dinh Nguyen <Dinh.Nguyen@freescale.com>
Diffstat (limited to 'arch/arm/plat-mxc/pwm.c')
| -rw-r--r-- | arch/arm/plat-mxc/pwm.c | 19 |
1 files changed, 16 insertions, 3 deletions
diff --git a/arch/arm/plat-mxc/pwm.c b/arch/arm/plat-mxc/pwm.c index c36f2630ed9..1453e36c8d2 100644 --- a/arch/arm/plat-mxc/pwm.c +++ b/arch/arm/plat-mxc/pwm.c @@ -6,6 +6,7 @@ * published by the Free Software Foundation. * * Derived from pxa PWM driver by eric miao <eric.miao@marvell.com> + * Copyright 2009-2010 Freescale Semiconductor, Inc. All Rights Reserved. */ #include <linux/module.h> @@ -36,7 +37,12 @@ #define MX3_PWMCR_CLKSRC_IPG (1 << 16) #define MX3_PWMCR_EN (1 << 0) - +#define MX3_PWMCR_STOPEN (1 << 25) +#define MX3_PWMCR_DOZEEN (1 << 24) +#define MX3_PWMCR_WAITEN (1 << 23) +#define MX3_PWMCR_DBGEN (1 << 22) +#define MX3_PWMCR_CLKSRC_IPG (1 << 16) +#define MX3_PWMCR_CLKSRC_IPG_32k (3 << 16) struct pwm_device { struct list_head node; @@ -57,7 +63,7 @@ int pwm_config(struct pwm_device *pwm, int duty_ns, int period_ns) if (pwm == NULL || period_ns == 0 || duty_ns > period_ns) return -EINVAL; - if (cpu_is_mx27() || cpu_is_mx3() || cpu_is_mx25()) { + if (!(cpu_is_mx1() || cpu_is_mx21())) { unsigned long long c; unsigned long period_cycles, duty_cycles, prescale; u32 cr; @@ -77,7 +83,9 @@ int pwm_config(struct pwm_device *pwm, int duty_ns, int period_ns) writel(duty_cycles, pwm->mmio_base + MX3_PWMSAR); writel(period_cycles, pwm->mmio_base + MX3_PWMPR); - cr = MX3_PWMCR_PRESCALER(prescale) | MX3_PWMCR_EN; + cr = MX3_PWMCR_PRESCALER(prescale) | + MX3_PWMCR_STOPEN | MX3_PWMCR_DOZEEN | + MX3_PWMCR_WAITEN | MX3_PWMCR_DBGEN; if (cpu_is_mx25()) cr |= MX3_PWMCR_CLKSRC_IPG; @@ -115,6 +123,7 @@ EXPORT_SYMBOL(pwm_config); int pwm_enable(struct pwm_device *pwm) { + unsigned long reg; int rc = 0; if (!pwm->clk_enabled) { @@ -122,6 +131,10 @@ int pwm_enable(struct pwm_device *pwm) if (!rc) pwm->clk_enabled = 1; } + + reg = readl(pwm->mmio_base + MX3_PWMCR); + reg |= MX3_PWMCR_EN; + writel(reg, pwm->mmio_base + MX3_PWMCR); return rc; } EXPORT_SYMBOL(pwm_enable); |