diff options
| author | Ranjani Vaidyanathan <ra5478@freescale.com> | 2011-10-07 12:35:29 -0500 |
|---|---|---|
| committer | Eric Miao <eric.miao@canonical.com> | 2011-11-10 07:38:46 +0800 |
| commit | b8de591b45582a04931ed4d69d190a0e14a00663 (patch) | |
| tree | b50572878a08a9d516f2543d7f98f3f2813fb886 /arch/arm/mach-mx6/cpu.c | |
| parent | 041098effda874e157bd97556712750d2aee36ff (diff) | |
ENGR00159641: MX6-Add DVFS-CORE support
Add DVFS-CORE support for MX6 quad/dual SOC.
Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
Diffstat (limited to 'arch/arm/mach-mx6/cpu.c')
| -rw-r--r-- | arch/arm/mach-mx6/cpu.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/mach-mx6/cpu.c b/arch/arm/mach-mx6/cpu.c index ddc7b98f959..46ac7da8cbe 100644 --- a/arch/arm/mach-mx6/cpu.c +++ b/arch/arm/mach-mx6/cpu.c @@ -38,6 +38,8 @@ extern void mx6_wait(void); struct cpu_op *(*get_cpu_op)(int *op); static void __iomem *arm_base = IO_ADDRESS(MX6Q_A9_PLATFRM_BASE); +void __iomem *gpc_base; +void __iomem *ccm_base; int mx6_set_cpu_voltage(u32 cpu_volt) { @@ -104,6 +106,9 @@ static int __init post_cpu_init(void) memcpy((void *)cpaddr, mx6_wait, SZ_4K); mx6_wait_in_iram = (void *)mx6_wait_in_iram_base; + gpc_base = MX6_IO_ADDRESS(GPC_BASE_ADDR); + ccm_base = MX6_IO_ADDRESS(CCM_BASE_ADDR); + return 0; } |