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author | Catalin Marinas <catalin.marinas@arm.com> | 2010-08-09 10:27:20 +0100 |
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committer | Catalin Marinas <catalin.marinas@arm.com> | 2010-08-09 10:32:47 +0100 |
commit | 5fea9ea16c988568ad0a9d0f09237883b80fb303 (patch) | |
tree | e3eead5bbc17887cc168bd66045c7d0b181c7a97 /arch/arm/kernel/setup.c | |
parent | 1c8c36795c1090a3c04be8c6ac4e23c5681eb86d (diff) |
ARM: Improve the L2 cache performance when PL310 is used
With this L2 cache controller, the cache maintenance by PA and sync
operations are atomic and do not require a "wait" loop. This patch
conditionally defines the cache_wait() function.
Since L2x0 cache controllers do not work with ARMv7 CPUs, the patch
automatically enables CACHE_PL310 when only CPU_V7 is defined.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm/kernel/setup.c')
0 files changed, 0 insertions, 0 deletions