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authorLinus Torvalds <torvalds@g5.osdl.org>2006-02-24 16:00:36 -0800
committerLinus Torvalds <torvalds@g5.osdl.org>2006-02-24 16:00:36 -0800
commitc946160e601c70a0ae0aa807461dd0232bcaf3a7 (patch)
tree0554732c1bb8ff38dac0ad143a6f455de11677f9
parent2cb5b6beef3a3357ef1f2a580d5e2284516efc39 (diff)
parentabbea7187296a7fb316a55f2319438c2bf881f0a (diff)
downloadlinux-linaro-c946160e601c70a0ae0aa807461dd0232bcaf3a7.tar.gz
Merge master.kernel.org:/home/rmk/linux-2.6-arm
-rw-r--r--arch/arm/mach-at91rm9200/gpio.c14
1 files changed, 12 insertions, 2 deletions
diff --git a/arch/arm/mach-at91rm9200/gpio.c b/arch/arm/mach-at91rm9200/gpio.c
index a9f718bf8ba..0e396feec46 100644
--- a/arch/arm/mach-at91rm9200/gpio.c
+++ b/arch/arm/mach-at91rm9200/gpio.c
@@ -274,8 +274,18 @@ static void gpio_irq_handler(unsigned irq, struct irqdesc *desc, struct pt_regs
gpio = &irq_desc[pin];
while (isr) {
- if (isr & 1)
- gpio->handle(pin, gpio, regs);
+ if (isr & 1) {
+ if (unlikely(gpio->disable_depth)) {
+ /*
+ * The core ARM interrupt handler lazily disables IRQs so
+ * another IRQ must be generated before it actually gets
+ * here to be disabled on the GPIO controller.
+ */
+ gpio_irq_mask(pin);
+ }
+ else
+ gpio->handle(pin, gpio, regs);
+ }
pin++;
gpio++;
isr >>= 1;