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authorEric Miao <eric.miao@linaro.org>2012-01-13 14:50:21 +0800
committerEric Miao <eric.miao@linaro.org>2012-01-13 14:50:21 +0800
commit810de279f4eedf874b725371999b96033a7156ab (patch)
tree7d23e56df6dd8f3b6ebdd514b7a0d356f96a7fbd
parent668c4a3c1feab8972648c8aab0aedc8bbbbaeeea (diff)
parent87fce0dcb864fa943c19d9ec8ae7c42f5826772c (diff)
downloadlinux-linaro-810de279f4eedf874b725371999b96033a7156ab.tar.gz
Merge branch 'topic/lt-3.2-imx6-display' into lt-3.2-imx6
* topic/lt-3.2-imx6-display: imx: ipu3: add hwtyp support dts/imx6q: change ipu compatible name to imx6q-ipu BASE: imx6q: add cpu_is_mx6q support UGLY: pwm: modify check fb function for lvds imx: ipuv3: change dev_err to dev_warn for some function ENGR00171052 mxc hdmi: fix HDMI CSC clock setting ENGR00170938-2 mxc hdmi: Enable HDMI output color space convert ENGR00170938-1 mxc hdmi: Enable HDMI output color space convert
-rw-r--r--arch/arm/boot/dts/imx6q.dtsi4
-rw-r--r--arch/arm/mach-imx/mach-imx6q.c6
-rw-r--r--arch/arm/plat-mxc/include/mach/mxc.h14
-rw-r--r--arch/arm/plat-mxc/include/mach/mxc_hdmi.h34
-rw-r--r--drivers/mxc/ipu3/ipu_common.c49
-rw-r--r--drivers/mxc/ipu3/ipu_prv.h1
-rw-r--r--drivers/video/backlight/pwm_bl.c9
-rw-r--r--drivers/video/mxc_hdmi.c65
8 files changed, 123 insertions, 59 deletions
diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi
index e25883b..09f0bec 100644
--- a/arch/arm/boot/dts/imx6q.dtsi
+++ b/arch/arm/boot/dts/imx6q.dtsi
@@ -614,14 +614,14 @@
};
ipu@0x02400000 { /* IPU1 */
- compatible = "fsl,ipuv3";
+ compatible = "fsl,imx6q-ipu";
reg = <0x02400000 0x400000>;
interrupts = <0 5 0x04 0 6 0x04>;
revision = <4>;
};
ipu@0x02800000 { /* IPU2 */
- compatible = "fsl,ipuv3";
+ compatible = "fsl,imx6q-ipu";
reg = <0x02800000 0x400000>;
interrupts = <0 7 0x04 0 8 0x04>;
revision = <4>;
diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c
index 6dbb506..6fd1241 100644
--- a/arch/arm/mach-imx/mach-imx6q.c
+++ b/arch/arm/mach-imx/mach-imx6q.c
@@ -171,8 +171,8 @@ static struct mxc_vpu_platform_data vpu_pdata = {
};
static const struct of_dev_auxdata imx6q_auxdata_lookup[] __initconst = {
- OF_DEV_AUXDATA("fsl,ipuv3", MX6Q_IPU1_BASE_ADDR, "imx-ipuv3.0", &ipuv3_pdata),
- OF_DEV_AUXDATA("fsl,ipuv3", MX6Q_IPU2_BASE_ADDR, "imx-ipuv3.1", &ipuv3_pdata),
+ OF_DEV_AUXDATA("fsl,imx6q-ipu", MX6Q_IPU1_BASE_ADDR, "imx-ipuv3.0", &ipuv3_pdata),
+ OF_DEV_AUXDATA("fsl,imx6q-ipu", MX6Q_IPU2_BASE_ADDR, "imx-ipuv3.1", &ipuv3_pdata),
OF_DEV_AUXDATA("fsl,vpu", MX6Q_VPU_BASE_ADDR, "mxc_vpu.0", &vpu_pdata),
OF_DEV_AUXDATA("fsl,imx6q-ahci", MX6Q_SATA_BASE_ADDR, "imx6q-ahci", &imx_sata_pdata),
};
@@ -260,6 +260,8 @@ static void __init imx6q_map_io(void)
init_consistent_dma_size(SZ_64M);
+ mxc_set_cpu_type(MXC_CPU_MX6Q);
+
if (!system_rev)
system_rev = 0x63000;
}
diff --git a/arch/arm/plat-mxc/include/mach/mxc.h b/arch/arm/plat-mxc/include/mach/mxc.h
index d6062b0..3fb4d1f 100644
--- a/arch/arm/plat-mxc/include/mach/mxc.h
+++ b/arch/arm/plat-mxc/include/mach/mxc.h
@@ -35,6 +35,7 @@
#define MXC_CPU_MX50 50
#define MXC_CPU_MX51 51
#define MXC_CPU_MX53 53
+#define MXC_CPU_MX6Q 63
#define IMX_CHIP_REVISION_1_0 0x10
#define IMX_CHIP_REVISION_1_1 0x11
@@ -192,8 +193,19 @@ extern unsigned int __mxc_cpu_type;
# define cpu_is_mx53() (0)
#endif
+#ifdef CONFIG_SOC_IMX6Q
+# ifdef mxc_cpu_type
+# undef mxc_cpu_type
+# define mxc_cpu_type __mxc_cpu_type
+# else
+# define mxc_cpu_type MXC_CPU_MX6Q
+# endif
+# define cpu_is_mx6q() (mxc_cpu_type == MXC_CPU_MX6Q)
+#else
+# define cpu_is_mx6q() (0)
+#endif
+
#define cpu_is_mx37() (0)
-#define cpu_is_mx6q() (0)
#ifndef __ASSEMBLY__
diff --git a/arch/arm/plat-mxc/include/mach/mxc_hdmi.h b/arch/arm/plat-mxc/include/mach/mxc_hdmi.h
index 56729b2..02a413f 100644
--- a/arch/arm/plat-mxc/include/mach/mxc_hdmi.h
+++ b/arch/arm/plat-mxc/include/mach/mxc_hdmi.h
@@ -787,26 +787,26 @@ enum {
HDMI_FC_PRCONF_OUTPUT_PR_FACTOR_MASK = 0x0F,
HDMI_FC_PRCONF_OUTPUT_PR_FACTOR_OFFSET = 0,
-/* FC_AVICONF0-FC_AVICONF2 field values */
- HDMI_FC_AVICONF0_PIX_FMT_MASK = 0x60,
+/* FC_AVICONF0-FC_AVICONF3 field values */
+ HDMI_FC_AVICONF0_PIX_FMT_MASK = 0x03,
HDMI_FC_AVICONF0_PIX_FMT_RGB = 0x00,
- HDMI_FC_AVICONF0_PIX_FMT_YCBCR422 = 0x20,
- HDMI_FC_AVICONF0_PIX_FMT_YCBCR444 = 0x40,
- HDMI_FC_AVICONF0_ACTIVE_FMT_MASK = 0x10,
- HDMI_FC_AVICONF0_ACTIVE_FMT_INFO_PRESENT = 0x10,
+ HDMI_FC_AVICONF0_PIX_FMT_YCBCR422 = 0x01,
+ HDMI_FC_AVICONF0_PIX_FMT_YCBCR444 = 0x02,
+ HDMI_FC_AVICONF0_ACTIVE_FMT_MASK = 0x40,
+ HDMI_FC_AVICONF0_ACTIVE_FMT_INFO_PRESENT = 0x40,
HDMI_FC_AVICONF0_ACTIVE_FMT_NO_INFO = 0x00,
HDMI_FC_AVICONF0_BAR_DATA_MASK = 0x0C,
HDMI_FC_AVICONF0_BAR_DATA_NO_DATA = 0x00,
- HDMI_FC_AVICONF0_BAR_DATA_VERT_BAR = 0x40,
- HDMI_FC_AVICONF0_BAR_DATA_HORIZ_BAR = 0x80,
- HDMI_FC_AVICONF0_BAR_DATA_VERT_HORIZ_BAR = 0xC0,
- HDMI_FC_AVICONF0_SCAN_INFO_MASK = 0x03,
- HDMI_FC_AVICONF0_SCAN_INFO_OVERSCAN = 0x01,
- HDMI_FC_AVICONF0_SCAN_INFO_UNDERSCAN = 0x02,
+ HDMI_FC_AVICONF0_BAR_DATA_VERT_BAR = 0x04,
+ HDMI_FC_AVICONF0_BAR_DATA_HORIZ_BAR = 0x08,
+ HDMI_FC_AVICONF0_BAR_DATA_VERT_HORIZ_BAR = 0x0C,
+ HDMI_FC_AVICONF0_SCAN_INFO_MASK = 0x30,
+ HDMI_FC_AVICONF0_SCAN_INFO_OVERSCAN = 0x10,
+ HDMI_FC_AVICONF0_SCAN_INFO_UNDERSCAN = 0x20,
HDMI_FC_AVICONF0_SCAN_INFO_NODATA = 0x00,
HDMI_FC_AVICONF1_ACTIVE_ASPECT_RATIO_MASK = 0x0F,
- HDMI_FC_AVICONF1_ACTIVE_ASPECT_RATIO_USE_CODED = 0x09,
+ HDMI_FC_AVICONF1_ACTIVE_ASPECT_RATIO_USE_CODED = 0x08,
HDMI_FC_AVICONF1_ACTIVE_ASPECT_RATIO_4_3 = 0x09,
HDMI_FC_AVICONF1_ACTIVE_ASPECT_RATIO_16_9 = 0x0A,
HDMI_FC_AVICONF1_ACTIVE_ASPECT_RATIO_14_9 = 0x0B,
@@ -840,10 +840,10 @@ enum {
HDMI_FC_AVICONF2_IT_CONTENT_VALID = 0x80,
HDMI_FC_AVICONF3_IT_CONTENT_TYPE_MASK = 0x03,
- HDMI_FC_AVICONF2_IT_CONTENT_TYPE_GRAPHICS = 0x00,
- HDMI_FC_AVICONF2_IT_CONTENT_TYPE_PHOTO = 0x01,
- HDMI_FC_AVICONF2_IT_CONTENT_TYPE_CINEMA = 0x02,
- HDMI_FC_AVICONF2_IT_CONTENT_TYPE_GAME = 0x03,
+ HDMI_FC_AVICONF3_IT_CONTENT_TYPE_GRAPHICS = 0x00,
+ HDMI_FC_AVICONF3_IT_CONTENT_TYPE_PHOTO = 0x01,
+ HDMI_FC_AVICONF3_IT_CONTENT_TYPE_CINEMA = 0x02,
+ HDMI_FC_AVICONF3_IT_CONTENT_TYPE_GAME = 0x03,
HDMI_FC_AVICONF3_QUANT_RANGE_MASK = 0x0C,
HDMI_FC_AVICONF3_QUANT_RANGE_LIMITED = 0x00,
HDMI_FC_AVICONF3_QUANT_RANGE_FULL = 0x04,
diff --git a/drivers/mxc/ipu3/ipu_common.c b/drivers/mxc/ipu3/ipu_common.c
index 3113e7b9..0a595d6 100644
--- a/drivers/mxc/ipu3/ipu_common.c
+++ b/drivers/mxc/ipu3/ipu_common.c
@@ -30,6 +30,7 @@
#include <linux/irq.h>
#include <linux/irqdesc.h>
#include <linux/clk.h>
+#include <linux/of_device.h>
#include <mach/clock.h>
#include <mach/hardware.h>
#include <mach/ipu-v3.h>
@@ -45,6 +46,29 @@ static struct ipu_soc ipu_array[MXC_IPU_MAX_NUM];
static int ipu_idx;
int g_ipu_hw_rev;
+enum mxc_ipu_hwtype {
+ IMX5_IPU,
+ IMX6_IPU,
+};
+
+static struct platform_device_id mxc_ipu_devtype[] = {
+ {
+ .name = "imx5-ipu",
+ .driver_data = IMX5_IPU,
+ }, {
+ .name = "imx6-ipu",
+ .driver_data = IMX6_IPU,
+ }, {
+ /* sentinel */
+ }
+};
+
+static const struct of_device_id mxc_ipu_dt_ids[] = {
+ { .compatible = "fsl,imx5-ipu", .data = &mxc_ipu_devtype[IMX5_IPU], },
+ { .compatible = "fsl,imx6q-ipu", .data = &mxc_ipu_devtype[IMX6_IPU], },
+ { /* sentinel */ }
+};
+
/* Static functions */
static irqreturn_t ipu_irq_handler(int irq, void *desc);
@@ -377,6 +401,8 @@ void _ipu_put(struct ipu_soc *ipu)
static int __devinit ipu_probe(struct platform_device *pdev)
{
struct imx_ipuv3_platform_data *plat_data = pdev->dev.platform_data;
+ const struct of_device_id *of_id =
+ of_match_device(mxc_ipu_dt_ids, &pdev->dev);
struct ipu_soc *ipu;
struct resource *res;
unsigned long ipu_base;
@@ -391,6 +417,10 @@ static int __devinit ipu_probe(struct platform_device *pdev)
ipu = &ipu_array[pdev->id];
memset(ipu, 0, sizeof(struct ipu_soc));
+ if (of_id)
+ pdev->id_entry = of_id->data;
+ ipu->hwtype = pdev->id_entry->driver_data;
+
spin_lock_init(&ipu->spin_lock);
mutex_init(&ipu->mutex_lock);
atomic_set(&ipu->ipu_use_count, 0);
@@ -910,7 +940,7 @@ void ipu_uninit_channel(struct ipu_soc *ipu, ipu_channel_t channel)
_ipu_lock(ipu);
if ((ipu->channel_init_mask & (1L << IPU_CHAN_ID(channel))) == 0) {
- dev_err(ipu->dev, "Channel already uninitialized %d\n",
+ dev_warn(ipu->dev, "Channel already uninitialized %d\n",
IPU_CHAN_ID(channel));
_ipu_unlock(ipu);
return;
@@ -923,7 +953,7 @@ void ipu_uninit_channel(struct ipu_soc *ipu, ipu_channel_t channel)
if (idma_is_set(ipu, IDMAC_CHA_EN, in_dma) ||
idma_is_set(ipu, IDMAC_CHA_EN, out_dma)) {
- dev_err(ipu->dev,
+ dev_warn(ipu->dev,
"Channel %d is not disabled, disable first\n",
IPU_CHAN_ID(channel));
_ipu_unlock(ipu);
@@ -1253,7 +1283,7 @@ int32_t ipu_init_channel_buffer(struct ipu_soc *ipu, ipu_channel_t channel,
if (idma_is_set(ipu, IDMAC_CHA_PRI, dma_chan)) {
unsigned reg = IDMAC_CH_LOCK_EN_1;
uint32_t value = 0;
- if (cpu_is_mx53() || cpu_is_mx6q()) {
+ if (ipu->hwtype == IMX5_IPU || ipu->hwtype == IMX6_IPU) {
_ipu_ch_param_set_axi_id(ipu, dma_chan, 0);
switch (dma_chan) {
case 5:
@@ -1321,7 +1351,7 @@ int32_t ipu_init_channel_buffer(struct ipu_soc *ipu, ipu_channel_t channel,
} else
_ipu_ch_param_set_axi_id(ipu, dma_chan, 1);
} else {
- if (cpu_is_mx6q())
+ if (ipu->hwtype == IMX6_IPU)
_ipu_ch_param_set_axi_id(ipu, dma_chan, 1);
}
@@ -1943,7 +1973,7 @@ int32_t ipu_enable_channel(struct ipu_soc *ipu, ipu_channel_t channel)
_ipu_lock(ipu);
if (ipu->channel_enable_mask & (1L << IPU_CHAN_ID(channel))) {
- dev_err(ipu->dev, "Warning: channel already enabled %d\n",
+ dev_warn(ipu->dev, "Warning: channel already enabled %d\n",
IPU_CHAN_ID(channel));
_ipu_unlock(ipu);
return -EACCES;
@@ -2134,7 +2164,7 @@ int32_t ipu_disable_channel(struct ipu_soc *ipu, ipu_channel_t channel, bool wai
_ipu_lock(ipu);
if ((ipu->channel_enable_mask & (1L << IPU_CHAN_ID(channel))) == 0) {
- dev_err(ipu->dev, "Channel already disabled %d\n",
+ dev_warn(ipu->dev, "Channel already disabled %d\n",
IPU_CHAN_ID(channel));
_ipu_unlock(ipu);
return -EACCES;
@@ -2182,7 +2212,7 @@ int32_t ipu_disable_channel(struct ipu_soc *ipu, ipu_channel_t channel, bool wai
msleep(10);
timeout -= 10;
if (timeout <= 0) {
- dev_err(ipu->dev, "warning: wait for bg sync eof timeout\n");
+ dev_warn(ipu->dev, "warning: wait for bg sync eof timeout\n");
break;
}
}
@@ -2940,11 +2970,6 @@ static const struct dev_pm_ops mxcipu_pm_ops = {
.resume_noirq = ipu_resume_noirq,
};
-static const struct of_device_id mxc_ipu_dt_ids[] = {
- { .compatible = "fsl,ipuv3", },
- { /* sentinel */ }
-};
-
/*!
* This structure contains pointers to the power management callback functions.
*/
diff --git a/drivers/mxc/ipu3/ipu_prv.h b/drivers/mxc/ipu3/ipu_prv.h
index 42060c9..7b245a5 100644
--- a/drivers/mxc/ipu3/ipu_prv.h
+++ b/drivers/mxc/ipu3/ipu_prv.h
@@ -51,6 +51,7 @@ enum csc_type_t {
};
struct ipu_soc {
+ u8 hwtype;
bool online;
/*clk*/
diff --git a/drivers/video/backlight/pwm_bl.c b/drivers/video/backlight/pwm_bl.c
index 63ca212..facdb23 100644
--- a/drivers/video/backlight/pwm_bl.c
+++ b/drivers/video/backlight/pwm_bl.c
@@ -70,11 +70,14 @@ static int pwm_backlight_get_brightness(struct backlight_device *bl)
}
static int pwm_backlight_check_fb(struct backlight_device *bl,
- struct fb_info *info)
+ struct fb_info *info)
{
- struct pwm_bl_data *pb = dev_get_drvdata(&bl->dev);
+ char *id = info->fix.id;
- return !pb->check_fb || pb->check_fb(pb->dev, info);
+ if (!strcmp(id, "DISP4 BG"))
+ return 1;
+ else
+ return 0;
}
static const struct backlight_ops pwm_backlight_ops = {
diff --git a/drivers/video/mxc_hdmi.c b/drivers/video/mxc_hdmi.c
index b212ad1..badc211 100644
--- a/drivers/video/mxc_hdmi.c
+++ b/drivers/video/mxc_hdmi.c
@@ -75,7 +75,7 @@
#define YCBCR444 1
#define YCBCR422_16BITS 2
#define YCBCR422_8BITS 3
-#define XVYCC444 4
+#define XVYCC444 4
/*
* We follow a flowchart which is in the "Synopsys DesignWare Courses
@@ -264,7 +264,7 @@ static void hdmi_video_sample(struct mxc_hdmi *hdmi)
color_format = 0x07;
else
return;
- } else if (hdmi->hdmi_data.enc_in_format == XVYCC444) {
+ } else if (hdmi->hdmi_data.enc_in_format == YCBCR444) {
if (hdmi->hdmi_data.enc_color_depth == 8)
color_format = 0x09;
else if (hdmi->hdmi_data.enc_color_depth == 10)
@@ -314,14 +314,14 @@ static int isColorSpaceDecimation(struct mxc_hdmi *hdmi)
{
return ((hdmi->hdmi_data.enc_out_format == YCBCR422_8BITS) &&
(hdmi->hdmi_data.enc_in_format == RGB ||
- hdmi->hdmi_data.enc_in_format == XVYCC444));
+ hdmi->hdmi_data.enc_in_format == YCBCR444));
}
static int isColorSpaceInterpolation(struct mxc_hdmi *hdmi)
{
return ((hdmi->hdmi_data.enc_in_format == YCBCR422_8BITS) &&
(hdmi->hdmi_data.enc_out_format == RGB
- || hdmi->hdmi_data.enc_out_format == XVYCC444));
+ || hdmi->hdmi_data.enc_out_format == YCBCR444));
}
/*!
@@ -502,7 +502,7 @@ static void hdmi_video_csc(struct mxc_hdmi *hdmi)
if (isColorSpaceInterpolation(hdmi))
interpolation = HDMI_CSC_CFG_INTMODE_CHROMA_INT_FORMULA1;
else if (isColorSpaceDecimation(hdmi))
- decimation = HDMI_CSC_CFG_DECMODE_CHROMA_INT_FORMULA1;
+ decimation = HDMI_CSC_CFG_DECMODE_CHROMA_INT_FORMULA3;
if (hdmi->hdmi_data.enc_color_depth == 8)
color_depth = HDMI_CSC_SCALE_CSC_COLORDE_PTH_24BPP;
@@ -839,6 +839,7 @@ static int hdmi_phy_configure(struct mxc_hdmi *hdmi, unsigned char pRep,
else if (cRes != 8 && cRes != 12)
return false;
+ /* Enable csc path */
if (cscOn)
val = HDMI_MC_FLOWCTRL_FEED_THROUGH_OFF_CSC_IN_PATH;
else
@@ -1070,9 +1071,14 @@ static int hdmi_phy_configure(struct mxc_hdmi *hdmi, unsigned char pRep,
static void mxc_hdmi_phy_init(struct mxc_hdmi *hdmi)
{
int i;
+ bool cscon = false;
dev_dbg(&hdmi->pdev->dev, "%s\n", __func__);
+ /*check csc whether needed activated in HDMI mode */
+ cscon = (isColorSpaceConversion(hdmi) &&
+ !hdmi->hdmi_data.video_mode.mDVI);
+
/* HDMI Phy spec says to do the phy initialization sequence twice */
for (i = 0 ; i < 2 ; i++) {
mxc_hdmi_phy_sel_data_en_pol(1);
@@ -1080,8 +1086,8 @@ static void mxc_hdmi_phy_init(struct mxc_hdmi *hdmi)
mxc_hdmi_phy_enable_tmds(0);
mxc_hdmi_phy_enable_power(0);
- /* TODO: Enable CSC */
- hdmi_phy_configure(hdmi, 0, 8, false);
+ /* Enable CSC */
+ hdmi_phy_configure(hdmi, 0, 8, cscon);
}
hdmi->phy_enabled = true;
@@ -1117,6 +1123,7 @@ static void hdmi_config_AVI(struct mxc_hdmi *hdmi)
{
u8 val;
u8 pix_fmt;
+ u8 under_scan;
u8 act_ratio, coded_ratio, colorimetry, ext_colorimetry;
struct fb_videomode mode;
const struct fb_videomode *edid_mode;
@@ -1138,21 +1145,25 @@ static void hdmi_config_AVI(struct mxc_hdmi *hdmi)
/********************************************
* AVI Data Byte 1
********************************************/
- if (hdmi->edid_cfg.cea_ycbcr444)
+ if (hdmi->hdmi_data.enc_out_format == YCBCR444)
pix_fmt = HDMI_FC_AVICONF0_PIX_FMT_YCBCR444;
- else if (hdmi->edid_cfg.cea_ycbcr422)
+ else if (hdmi->hdmi_data.enc_out_format == YCBCR422_8BITS)
pix_fmt = HDMI_FC_AVICONF0_PIX_FMT_YCBCR422;
else
pix_fmt = HDMI_FC_AVICONF0_PIX_FMT_RGB;
+ if (hdmi->edid_cfg.cea_underscan)
+ under_scan = HDMI_FC_AVICONF0_SCAN_INFO_UNDERSCAN;
+ else
+ under_scan = HDMI_FC_AVICONF0_SCAN_INFO_NODATA;
+
/*
* Active format identification data is present in the AVI InfoFrame.
- * No scan info, no bar data
+ * Under scan info, no bar data
*/
- val = pix_fmt |
+ val = pix_fmt | under_scan |
HDMI_FC_AVICONF0_ACTIVE_FMT_INFO_PRESENT |
- HDMI_FC_AVICONF0_BAR_DATA_NO_DATA |
- HDMI_FC_AVICONF0_SCAN_INFO_NODATA;
+ HDMI_FC_AVICONF0_BAR_DATA_NO_DATA;
hdmi_writeb(val, HDMI_FC_AVICONF0);
@@ -1220,7 +1231,7 @@ static void hdmi_config_AVI(struct mxc_hdmi *hdmi)
hdmi_writeb(val, HDMI_FC_PRCONF);
/* IT Content and quantization range = don't care */
- val = HDMI_FC_AVICONF2_IT_CONTENT_TYPE_GRAPHICS |
+ val = HDMI_FC_AVICONF3_IT_CONTENT_TYPE_GRAPHICS |
HDMI_FC_AVICONF3_QUANT_RANGE_LIMITED;
hdmi_writeb(val, HDMI_FC_AVICONF3);
@@ -1421,6 +1432,12 @@ static void mxc_hdmi_enable_video_path(struct mxc_hdmi *hdmi)
clkdis &= ~HDMI_MC_CLKDIS_TMDSCLK_DISABLE;
hdmi_writeb(clkdis, HDMI_MC_CLKDIS);
+
+ /* Enable csc path */
+ if (isColorSpaceConversion(hdmi)) {
+ clkdis &= ~HDMI_MC_CLKDIS_CSCCLK_DISABLE;
+ hdmi_writeb(clkdis, HDMI_MC_CLKDIS);
+ }
}
static void hdmi_enable_audio_clk(struct mxc_hdmi *hdmi)
@@ -1526,10 +1543,12 @@ static void mxc_hdmi_edid_rebuild_modelist(struct mxc_hdmi *hdmi)
FB_VMODE_INTERLACED)) {
dev_dbg(&hdmi->pdev->dev, "Added mode %d:", i);
dev_dbg(&hdmi->pdev->dev,
- "xres = %d, yres = %d, freq = %d\n",
+ "xres = %d, yres = %d, freq = %d, vmode = %d, flag = %d\n",
hdmi->fbi->monspecs.modedb[i].xres,
hdmi->fbi->monspecs.modedb[i].yres,
- hdmi->fbi->monspecs.modedb[i].refresh);
+ hdmi->fbi->monspecs.modedb[i].refresh,
+ hdmi->fbi->monspecs.modedb[i].vmode,
+ hdmi->fbi->monspecs.modedb[i].flag);
fb_add_videomode(&hdmi->fbi->monspecs.modedb[i],
&hdmi->fbi->modelist);
@@ -1914,12 +1933,14 @@ static void mxc_hdmi_setup(struct mxc_hdmi *hdmi)
hdmi->hdmi_data.enc_in_format = RGB;
hdmi->hdmi_data.enc_out_format = RGB;
- if (hdmi->edid_cfg.hdmi_cap) {
- if (hdmi->edid_cfg.cea_ycbcr444)
- hdmi->hdmi_data.enc_out_format = YCBCR444;
- else if (hdmi->edid_cfg.cea_ycbcr422)
- hdmi->hdmi_data.enc_out_format = YCBCR422_8BITS;
- }
+ /*DVI mode not support non-RGB */
+ if (!hdmi->hdmi_data.video_mode.mDVI)
+ if (hdmi->edid_cfg.hdmi_cap) {
+ if (hdmi->edid_cfg.cea_ycbcr444)
+ hdmi->hdmi_data.enc_out_format = YCBCR444;
+ else if (hdmi->edid_cfg.cea_ycbcr422)
+ hdmi->hdmi_data.enc_out_format = YCBCR422_8BITS;
+ }
hdmi->hdmi_data.enc_color_depth = 8;
hdmi->hdmi_data.pix_repet_factor = 0;