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authorJason Chen <b02280@freescale.com>2011-09-01 16:00:03 +0800
committerEric Miao <eric.miao@linaro.org>2011-10-14 09:56:59 +0800
commit16ad338f90bb55abd29062bf4655222bb0438d22 (patch)
treee55b0ae13876cb14280d3905c0ed37ff89b9c632
parent8959163278951c5852d47ee057539b23a30bb5e7 (diff)
downloadlinux-linaro-16ad338f90bb55abd29062bf4655222bb0438d22.tar.gz
mx53_loco: add vpu device
Signed-off-by: Jason Chen <b02280@freescale.com> Signed-off-by: Eric Miao <eric.miao@linaro.org>
-rw-r--r--arch/arm/mach-mx5/Kconfig2
-rw-r--r--arch/arm/mach-mx5/board-mx53_loco.c1
-rw-r--r--arch/arm/mach-mx5/devices-imx53.h3
-rw-r--r--arch/arm/plat-mxc/devices/Kconfig3
-rw-r--r--arch/arm/plat-mxc/devices/Makefile1
-rw-r--r--arch/arm/plat-mxc/devices/platform-imx_vpu.c149
-rw-r--r--arch/arm/plat-mxc/include/mach/devices-common.h13
7 files changed, 172 insertions, 0 deletions
diff --git a/arch/arm/mach-mx5/Kconfig b/arch/arm/mach-mx5/Kconfig
index 61b1b8716c1..9ad76359ae8 100644
--- a/arch/arm/mach-mx5/Kconfig
+++ b/arch/arm/mach-mx5/Kconfig
@@ -34,6 +34,7 @@ config SOC_IMX51
select IMX_HAVE_PLATFORM_IMX_IIM
select IMX_HAVE_PLATFORM_IMX_IPUV3
select IMX_HAVE_PLATFORM_IMX_TVE
+ select IMX_HAVE_PLATFORM_IMX_VPU
config SOC_IMX53
bool
@@ -48,6 +49,7 @@ config SOC_IMX53
select IMX_HAVE_PLATFORM_IMX_IPUV3
select IMX_HAVE_PLATFORM_IMX_TVE
select IMX_HAVE_PLATFORM_LDB
+ select IMX_HAVE_PLATFORM_IMX_VPU
if ARCH_MX50_SUPPORTED
#comment "i.MX50 machines:"
diff --git a/arch/arm/mach-mx5/board-mx53_loco.c b/arch/arm/mach-mx5/board-mx53_loco.c
index eb1c08a352c..913ef709222 100644
--- a/arch/arm/mach-mx5/board-mx53_loco.c
+++ b/arch/arm/mach-mx5/board-mx53_loco.c
@@ -429,6 +429,7 @@ static void __init mx53_loco_board_init(void)
for (i = 0; i < ARRAY_SIZE(loco_fb_data); i++)
imx53_add_ipuv3fb(i, &loco_fb_data[i]);
+ imx53_add_vpu();
imx53_add_ldb(&ldb_data);
imx53_add_tve(&tve_data);
imx53_add_v4l2_output(0);
diff --git a/arch/arm/mach-mx5/devices-imx53.h b/arch/arm/mach-mx5/devices-imx53.h
index b9f23adc7d6..aab48b05d93 100644
--- a/arch/arm/mach-mx5/devices-imx53.h
+++ b/arch/arm/mach-mx5/devices-imx53.h
@@ -76,3 +76,6 @@ extern const struct imx_mxc_pwm_data imx53_mxc_pwm_data[] __initconst;
#define imx53_add_v4l2_output(id) \
platform_device_register_resndata(NULL, "mxc_v4l2_output",\
id, NULL, 0, NULL, 0);
+
+extern const struct imx_vpu_data imx53_vpu_data __initconst;
+#define imx53_add_vpu() imx_add_vpu(&imx53_vpu_data)
diff --git a/arch/arm/plat-mxc/devices/Kconfig b/arch/arm/plat-mxc/devices/Kconfig
index 7674188f821..c1051ac8038 100644
--- a/arch/arm/plat-mxc/devices/Kconfig
+++ b/arch/arm/plat-mxc/devices/Kconfig
@@ -95,3 +95,6 @@ config IMX_HAVE_PLATFORM_IMX_IIM
config IMX_HAVE_PLATFORM_AHCI
bool
default y if ARCH_MX53
+
+config IMX_HAVE_PLATFORM_IMX_VPU
+ bool
diff --git a/arch/arm/plat-mxc/devices/Makefile b/arch/arm/plat-mxc/devices/Makefile
index ad96e8d1303..7eff7f2cb03 100644
--- a/arch/arm/plat-mxc/devices/Makefile
+++ b/arch/arm/plat-mxc/devices/Makefile
@@ -17,6 +17,7 @@ obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_UDC) += platform-imx_udc.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_IPU_CORE) += platform-ipu-core.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_IPUV3) += platform-imx_ipuv3.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_TVE) += platform-imx_tve.o
+obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_VPU) += platform-imx_vpu.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_LDB) += platform-imx_ldb.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_MX1_CAMERA) += platform-mx1-camera.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_MX2_CAMERA) += platform-mx2-camera.o
diff --git a/arch/arm/plat-mxc/devices/platform-imx_vpu.c b/arch/arm/plat-mxc/devices/platform-imx_vpu.c
new file mode 100644
index 00000000000..a3a3927e535
--- /dev/null
+++ b/arch/arm/plat-mxc/devices/platform-imx_vpu.c
@@ -0,0 +1,149 @@
+/*
+ * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Jason Chen <jason.chen@freescale.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it under
+ * the terms of the GNU General Public License version 2 as published by the
+ * Free Software Foundation.
+ */
+#include <mach/hardware.h>
+#include <mach/devices-common.h>
+
+#define imx5_vpu_data_entry_single(soc, flag, size, vpu_reset, vpu_pg) \
+ { \
+ .iobase = soc ## _VPU_BASE_ADDR, \
+ .irq_ipi = soc ## _INT_VPU, \
+ .iram_enable = flag, \
+ .iram_size = size, \
+ .reset = vpu_reset, \
+ .pg = vpu_pg, \
+ }
+
+#define imx6_vpu_data_entry_single(soc, flag, size, vpu_reset, vpu_pg) \
+ { \
+ .iobase = soc ## _VPU_BASE_ADDR, \
+ .irq_ipi = soc ## _INT_VPU_IPI, \
+ .irq_jpg = soc ## _INT_VPU_JPG, \
+ .iram_enable = flag, \
+ .iram_size = size, \
+ .reset = vpu_reset, \
+ .pg = vpu_pg, \
+ }
+
+#ifdef CONFIG_SOC_IMX51
+void mx51_vpu_reset(void)
+{
+ u32 reg;
+ void __iomem *src_base;
+
+ src_base = ioremap(MX51_SRC_BASE_ADDR, PAGE_SIZE);
+
+ /* mask interrupt due to vpu passed reset */
+ reg = __raw_readl(src_base + 0x18);
+ reg |= 0x02;
+ __raw_writel(reg, src_base + 0x18);
+
+ reg = __raw_readl(src_base);
+ reg |= 0x5; /* warm reset vpu */
+ __raw_writel(reg, src_base);
+ while (__raw_readl(src_base) & 0x04)
+ ;
+
+ iounmap(src_base);
+}
+
+void mx51_vpu_pg(int enable)
+{
+ if (enable) {
+ __raw_writel(MXC_PGCR_PCR, MX51_PGC_VPU_PGCR);
+ __raw_writel(MXC_PGSR_PSR, MX51_PGC_VPU_PGSR);
+ } else {
+ __raw_writel(0x0, MX51_PGC_VPU_PGCR);
+ if (__raw_readl(MX51_PGC_VPU_PGSR) & MXC_PGSR_PSR)
+ printk(KERN_DEBUG "power gating successful\n");
+ __raw_writel(MXC_PGSR_PSR, MX51_PGC_VPU_PGSR);
+ }
+}
+const struct imx_vpu_data imx51_vpu_data __initconst =
+ imx5_vpu_data_entry_single(MX51,
+ false, 0x14000, mx51_vpu_reset, mx51_vpu_pg);
+#endif
+
+#ifdef CONFIG_SOC_IMX53
+void mx53_vpu_reset(void)
+{
+ u32 reg;
+ void __iomem *src_base;
+
+ src_base = ioremap(MX53_SRC_BASE_ADDR, PAGE_SIZE);
+
+ /* mask interrupt due to vpu passed reset */
+ reg = __raw_readl(src_base + 0x18);
+ reg |= 0x02;
+ __raw_writel(reg, src_base + 0x18);
+
+ reg = __raw_readl(src_base);
+ reg |= 0x5; /* warm reset vpu */
+ __raw_writel(reg, src_base);
+ while (__raw_readl(src_base) & 0x04)
+ ;
+
+ iounmap(src_base);
+}
+
+void mx53_vpu_pg(int enable)
+{
+ if (enable) {
+ __raw_writel(MXC_PGCR_PCR, MX53_PGC_VPU_PGCR);
+ __raw_writel(MXC_PGSR_PSR, MX53_PGC_VPU_PGSR);
+ } else {
+ __raw_writel(0x0, MX53_PGC_VPU_PGCR);
+ if (__raw_readl(MX53_PGC_VPU_PGSR) & MXC_PGSR_PSR)
+ printk(KERN_DEBUG "power gating successful\n");
+ __raw_writel(MXC_PGSR_PSR, MX53_PGC_VPU_PGSR);
+ }
+}
+
+const struct imx_vpu_data imx53_vpu_data __initconst =
+ imx5_vpu_data_entry_single(MX53,
+ true, 0x14000, mx53_vpu_reset, mx53_vpu_pg);
+#endif
+
+#ifdef CONFIG_SOC_IMX6Q
+const struct imx_vpu_data imx6q_vpu_data __initconst =
+ imx6_vpu_data_entry_single(MX6Q,
+ true, 0x21000, NULL, NULL);
+#endif
+
+struct platform_device *__init imx_add_vpu(
+ const struct imx_vpu_data *data)
+{
+ struct mxc_vpu_platform_data pdata;
+ struct resource res[] = {
+ {
+ .start = data->iobase,
+ .end = data->iobase + SZ_16K - 1,
+ .flags = IORESOURCE_MEM,
+ }, {
+ .start = data->irq_ipi,
+ .end = data->irq_ipi,
+ .flags = IORESOURCE_IRQ,
+ },
+#ifdef CONFIG_SOC_IMX6Q
+ {
+ .start = data->irq_jpg,
+ .end = data->irq_jpg,
+ .flags = IORESOURCE_IRQ,
+ },
+#endif
+ };
+
+ pdata.reset = data->reset;
+ pdata.pg = data->pg;
+ pdata.iram_enable = data->iram_enable;
+ pdata.iram_size = data->iram_size;
+
+ return imx_add_platform_device("mxc_vpu", -1,
+ res, ARRAY_SIZE(res), &pdata, sizeof(pdata));
+}
+
diff --git a/arch/arm/plat-mxc/include/mach/devices-common.h b/arch/arm/plat-mxc/include/mach/devices-common.h
index f44c0a83b3a..fc9f0c18381 100644
--- a/arch/arm/plat-mxc/include/mach/devices-common.h
+++ b/arch/arm/plat-mxc/include/mach/devices-common.h
@@ -171,6 +171,19 @@ struct platform_device *__init imx_add_imx_udc(
const struct imx_imx_udc_data *data,
const struct imxusb_platform_data *pdata);
+#include <mach/mxc_vpu.h>
+struct imx_vpu_data {
+ resource_size_t iobase;
+ resource_size_t irq_ipi;
+ resource_size_t irq_jpg;
+ bool iram_enable;
+ int iram_size;
+ void (*reset) (void);
+ void (*pg) (int);
+};
+struct platform_device *__init imx_add_vpu(
+ const struct imx_vpu_data *data);
+
#include <mach/ipu-v3.h>
struct imx_ipuv3_data {
resource_size_t iobase;