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authorJason Chen <jason.chen@linaro.org>2011-12-05 17:47:35 +0800
committerEric Miao <eric.miao@linaro.org>2011-12-16 12:00:43 +0800
commit6cc045a8ac0b706f6f7997674fa991b92826c82f (patch)
treed1c58532a99843863050a6ab760fadd42ee36a2d
parente3c8a7544da6d3fab2eea00a990527d1c310bee0 (diff)
imx6q-saberlite: add ipu3 dt support
Signed-off-by: Jason Chen <jason.chen@linaro.org>
-rw-r--r--arch/arm/boot/dts/imx6q.dtsi14
-rw-r--r--arch/arm/mach-imx/clock-imx6q.c6
-rw-r--r--arch/arm/mach-imx/mach-imx6q.c25
-rw-r--r--arch/arm/mach-imx/src.c13
-rw-r--r--arch/arm/plat-mxc/include/mach/common.h2
-rw-r--r--arch/arm/plat-mxc/include/mach/mx6q.h3
-rw-r--r--drivers/mxc/ipu3/ipu_common.c19
7 files changed, 78 insertions, 4 deletions
diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi
index 7dda599558c..5d912e44a1c 100644
--- a/arch/arm/boot/dts/imx6q.dtsi
+++ b/arch/arm/boot/dts/imx6q.dtsi
@@ -571,5 +571,19 @@
status = "disabled";
};
};
+
+ ipu@0x02400000 { /* IPU1 */
+ compatible = "fsl,ipuv3";
+ reg = <0x02400000 0x400000>;
+ interrupts = <0 5 0x04 0 6 0x04>;
+ revision = <4>;
+ };
+
+ ipu@0x02800000 { /* IPU2 */
+ compatible = "fsl,ipuv3";
+ reg = <0x02800000 0x400000>;
+ interrupts = <0 7 0x04 0 8 0x04>;
+ revision = <4>;
+ };
};
};
diff --git a/arch/arm/mach-imx/clock-imx6q.c b/arch/arm/mach-imx/clock-imx6q.c
index 039a7abb165..86e7afbd9ea 100644
--- a/arch/arm/mach-imx/clock-imx6q.c
+++ b/arch/arm/mach-imx/clock-imx6q.c
@@ -1911,6 +1911,12 @@ static struct clk_lookup lookups[] = {
_REGISTER_CLOCK(NULL, "gpmi_io_clk", gpmi_io_clk),
_REGISTER_CLOCK(NULL, "usboh3_clk", usboh3_clk),
_REGISTER_CLOCK(NULL, "sata_clk", sata_clk),
+ _REGISTER_CLOCK(NULL, "ipu1_clk", ipu1_clk),
+ _REGISTER_CLOCK(NULL, "ipu2_clk", ipu2_clk),
+ _REGISTER_CLOCK(NULL, "ipu1_di0_clk", ipu1_di0_clk),
+ _REGISTER_CLOCK(NULL, "ipu1_di1_clk", ipu1_di1_clk),
+ _REGISTER_CLOCK(NULL, "ipu2_di0_clk", ipu2_di0_clk),
+ _REGISTER_CLOCK(NULL, "ipu2_di1_clk", ipu2_di1_clk),
};
int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode)
diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c
index 240fad03927..faf929961f0 100644
--- a/arch/arm/mach-imx/mach-imx6q.c
+++ b/arch/arm/mach-imx/mach-imx6q.c
@@ -23,10 +23,33 @@
#include <asm/mach/time.h>
#include <mach/common.h>
#include <mach/hardware.h>
+#include <mach/ipu-v3.h>
+
+static int mx6q_ipuv3_init(int id)
+{
+ imx_reset_ipu(id);
+ return 0;
+}
+
+static void mx6q_ipuv3_pg(int enable)
+{
+ /*TODO*/
+}
+
+static struct imx_ipuv3_platform_data ipuv3_pdata = {
+ .rev = 4,
+ .init = mx6q_ipuv3_init,
+ .pg = mx6q_ipuv3_pg,
+};
+
+static const struct of_dev_auxdata imx6q_auxdata_lookup[] __initconst = {
+ OF_DEV_AUXDATA("fsl,ipuv3", MX6Q_IPU1_BASE_ADDR, "imx-ipuv3.0", &ipuv3_pdata),
+ OF_DEV_AUXDATA("fsl,ipuv3", MX6Q_IPU2_BASE_ADDR, "imx-ipuv3.1", &ipuv3_pdata),
+};
static void __init imx6q_init_machine(void)
{
- of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
+ of_platform_populate(NULL, of_default_bus_match_table, imx6q_auxdata_lookup, NULL);
imx6q_pm_init();
}
diff --git a/arch/arm/mach-imx/src.c b/arch/arm/mach-imx/src.c
index a8e33681b73..ac8eb58aeeb 100644
--- a/arch/arm/mach-imx/src.c
+++ b/arch/arm/mach-imx/src.c
@@ -28,6 +28,19 @@ static void __iomem *src_base;
#define cpu_logical_map(cpu) 0
#endif
+void imx_reset_ipu(int ipu)
+{
+ u32 val;
+
+ /* hard reset the IPU */
+ val = readl_relaxed(src_base);
+ if (ipu == 0)
+ val |= 1 << 3;
+ else
+ val |= 1 << 12;
+ writel_relaxed(val, src_base);
+}
+
void imx_enable_cpu(int cpu, bool enable)
{
u32 mask, val;
diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h
index 787c2688eb0..43490df0edd 100644
--- a/arch/arm/plat-mxc/include/mach/common.h
+++ b/arch/arm/plat-mxc/include/mach/common.h
@@ -121,7 +121,7 @@ extern void imx_smp_prepare(void);
static inline void imx_scu_map_io(void) {}
static inline void imx_smp_prepare(void) {}
#endif
-extern void imx_enable_cpu(int cpu, bool enable);
+extern void imx_reset_ipu(int ipu);
extern void imx_set_cpu_jump(int cpu, void *jump_addr);
extern void imx_src_init(void);
extern void imx_gpc_init(void);
diff --git a/arch/arm/plat-mxc/include/mach/mx6q.h b/arch/arm/plat-mxc/include/mach/mx6q.h
index f9adfeb5ef4..57d62a5596c 100644
--- a/arch/arm/plat-mxc/include/mach/mx6q.h
+++ b/arch/arm/plat-mxc/include/mach/mx6q.h
@@ -31,4 +31,7 @@
#define MX6Q_UART4_BASE_ADDR 0x021f0000
#define MX6Q_UART_SIZE 0x4000
+#define MX6Q_IPU1_BASE_ADDR 0x02400000
+#define MX6Q_IPU2_BASE_ADDR 0x02800000
+
#endif /* __MACH_MX6Q_H__ */
diff --git a/drivers/mxc/ipu3/ipu_common.c b/drivers/mxc/ipu3/ipu_common.c
index 4a7ebc02548..3113e7b933b 100644
--- a/drivers/mxc/ipu3/ipu_common.c
+++ b/drivers/mxc/ipu3/ipu_common.c
@@ -42,6 +42,7 @@
#include "ipu_param_mem.h"
static struct ipu_soc ipu_array[MXC_IPU_MAX_NUM];
+static int ipu_idx;
int g_ipu_hw_rev;
/* Static functions */
@@ -381,9 +382,12 @@ static int __devinit ipu_probe(struct platform_device *pdev)
unsigned long ipu_base;
int ret = 0;
- if (pdev->id >= MXC_IPU_MAX_NUM)
+ if (ipu_idx >= MXC_IPU_MAX_NUM)
return -ENODEV;
+ pdev->id = ipu_idx;
+ ipu_idx++;
+
ipu = &ipu_array[pdev->id];
memset(ipu, 0, sizeof(struct ipu_soc));
@@ -391,7 +395,10 @@ static int __devinit ipu_probe(struct platform_device *pdev)
mutex_init(&ipu->mutex_lock);
atomic_set(&ipu->ipu_use_count, 0);
- g_ipu_hw_rev = plat_data->rev;
+ ret = of_property_read_u32(pdev->dev.of_node,
+ "revision", &g_ipu_hw_rev);
+ if (ret < 0 && plat_data)
+ g_ipu_hw_rev = plat_data->rev;
ipu->dev = &pdev->dev;
@@ -2933,13 +2940,21 @@ static const struct dev_pm_ops mxcipu_pm_ops = {
.resume_noirq = ipu_resume_noirq,
};
+static const struct of_device_id mxc_ipu_dt_ids[] = {
+ { .compatible = "fsl,ipuv3", },
+ { /* sentinel */ }
+};
+
/*!
* This structure contains pointers to the power management callback functions.
*/
static struct platform_driver mxcipu_driver = {
.driver = {
.name = "imx-ipuv3",
+#ifdef CONFIG_PM
.pm = &mxcipu_pm_ops,
+#endif
+ .of_match_table = mxc_ipu_dt_ids,
},
.probe = ipu_probe,
.remove = ipu_remove,